Patents by Inventor Nam-Oh Hwang

Nam-Oh Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11934271
    Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a plurality of storage regions, each including a plurality of memory cells; and a controller configured to provide a plurality of read retry sets, determine an applying order of the plurality of read retry sets based on characteristics of a read error occurred in a first storage region among the plurality of storage regions, and apply at least one of the read retry sets, based on the applying order, for a read retry operation performed on the first storage region.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: March 19, 2024
    Assignee: SK hynix Inc.
    Inventors: Nam Oh Hwang, Yong-Tae Kim, Soong-Sun Shin, Duck-Hoi Koo
  • Publication number: 20220121520
    Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a plurality of storage regions, each including a plurality of memory cells; and a controller configured to provide a plurality of read retry sets, determine an applying order of the plurality of read retry sets based on characteristics of a read error occurred in a first storage region among the plurality of storage regions, and apply at least one of the read retry sets, based on the applying order, for a read retry operation performed on the first storage region.
    Type: Application
    Filed: December 29, 2021
    Publication date: April 21, 2022
    Inventors: Nam Oh HWANG, Yong-Tae KIM, Soong-Sun SHIN, Duck-Hoi KOO
  • Patent number: 11237908
    Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a plurality of storage regions, each including a plurality of memory cells; and a controller configured to provide a plurality of read retry sets, determine an applying order of the plurality of read retry sets based on characteristics of a read error occurred in a first storage region among the plurality of storage regions, and apply at least one of the read retry sets, based on the applying order, for a read retry operation performed on the first storage region.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: February 1, 2022
    Assignee: SK hynix Inc.
    Inventors: Nam Oh Hwang, Yong-Tae Kim, Soong-Sun Shin, Duck-Hoi Koo
  • Publication number: 20200192759
    Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a plurality of storage regions, each including a plurality of memory cells; and a controller configured to provide a plurality of read retry sets, determine an applying order of the plurality of read retry sets based on characteristics of a read error occurred in a first storage region among the plurality of storage regions, and apply at least one of the read retry sets, based on the applying order, for a read retry operation performed on the first storage region.
    Type: Application
    Filed: February 24, 2020
    Publication date: June 18, 2020
    Inventors: Nam Oh HWANG, Yong-Tae KIM, Soong-Sun SHIN, Duck-Hoi KOO
  • Patent number: 10573380
    Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a memory device configured to generate first read voltages and second read voltages, based on initial read voltages and first and second offset voltages, in response to a user read command, and output first data and second data, which are acquired by performing read operations on multi-bit memory cells, based on the first read voltages and the second read voltages; and a memory controller configured to output the user read command, wherein the memory controller includes a state counter configured to count numbers of data bits respectively corresponding to a plurality of threshold voltage states from the first data and the second data, and extract numbers of memory cells respectively included in a plurality of threshold voltage regions divided by the first read voltages and the second read voltages by calculating the counted result.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: February 25, 2020
    Assignee: SK hynix Inc.
    Inventor: Nam Oh Hwang
  • Publication number: 20190080752
    Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a memory device configured to generate first read voltages and second read voltages, based on initial read voltages and first and second offset voltages, in response to a user read command, and output first data and second data, which are acquired by performing read operations on multi-bit memory cells, based on the first read voltages and the second read voltages; and a memory controller configured to output the user read command, wherein the memory controller includes a state counter configured to count numbers of data bits respectively corresponding to a plurality of threshold voltage states from the first data and the second data, and extract numbers of memory cells respectively included in a plurality of threshold voltage regions divided by the first read voltages and the second read voltages by calculating the counted result.
    Type: Application
    Filed: April 24, 2018
    Publication date: March 14, 2019
    Inventor: Nam Oh HWANG
  • Publication number: 20120297117
    Abstract: Disclosed is a data managing method of a storage device including a nonvolatile memory device. The data managing method includes detecting an update count of update-requested page data and allocating the update-requested page data to a first memory block or a second memory block based upon the update count, an erase count of the second memory block being different from that of the first memory block.
    Type: Application
    Filed: April 10, 2012
    Publication date: November 22, 2012
    Inventors: Han-Chan Jo, Nam-Oh Hwang