Abstract: A high speed digital image pattern matching circuit which recognizes an image pattern, and discriminates whether the recognized image pattern matches with a desired reference pattern and where pattern matching occurs. For discriminating whether a desired pattern is matched, an input pattern to be retrieved is digitally-modelled as two thresholds. The digitally modelled input image signal is blocked to have the same size as the reference pattern and compared with the reference pattern. The compared result is again compared with the thresholds for discriminating whether pattern matching occurs or not. The high speed digital image pattern matching circuit of the present invention utilizes two thresholds for modelling, thereby simplifying the input digital image signal in hardware and making processing speed very fast.