Patents by Inventor Nam Yin Leng

Nam Yin Leng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8097947
    Abstract: Methods and apparatus for eliminating wire sweep and shorting while avoiding the use of under-bump metallization and high cost attendant to the use of conventional redistribution layers. An anisotropically conductive (z-axis) conductive layer in the form of a film or tape is applied to an active surface of a die and used as a base for conductive redistribution bumps formed on the anisotropically conductive layer, bonded to ends of conductive columns thereof and wire bonded to bond pads of the die. Packages so formed may be connected to substrates either with additional wire bonds extending from the conductive redistribution bumps to terminal pads or by flip-chip bonding using conductive bumps formed on the conductive redistribution bumps to connect to the terminal pads. The acts of the methods may be performed at the wafer level. Semiconductor die assemblies may be formed using the methods.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: January 17, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Edmund Koon Tian Lua, Nam Yin Leng
  • Publication number: 20080157360
    Abstract: Methods and apparatus for eliminating wire sweep and shorting while avoiding the use of under-bump metallization and high cost attendant to the use of conventional redistribution layers. An anisotropically conductive (z-axis) conductive layer in the form of a film or tape is applied to the active surface of a die and used as a base for conductive redistribution bumps formed on the anisotropically conductive layer, bonded to the ends of conductive columns thereof and wire bonded to the bond pads of the die. Packages so formed may be connected to substrates either with additional wire bonds extending from the conductive redistribution bumps to terminal pads or by flip-chip bonding using conductive bumps formed on the conductive redistribution bumps to connect to the terminal pads. The acts of the methods may be performed at the wafer level. Semiconductor die assemblies may be formed using the methods.
    Type: Application
    Filed: February 28, 2008
    Publication date: July 3, 2008
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Edmund Koon Tian Lua, Nam Yin Leng
  • Patent number: 7358178
    Abstract: Methods and apparatus for eliminating wire sweep and shorting while avoiding the use of under-bump metallization and high cost attendant to the use of conventional redistribution layers. An anisotropically conductive (z-axis) conductive layer in the form of a film or tape is applied to the active surface of a die and used as a base for conductive redistribution bumps formed on the anisotropically conductive layer, bonded to the ends of conductive columns thereof and wire bonded to the bond pads of the die. Packages so formed may be connected to substrates either with additional wire bonds extending from the conductive redistribution bumps to terminal pads or by flip-chip bonding using conductive bumps formed on the conductive redistribution bumps to connect to the terminal pads. The acts of the methods may be performed at the wafer level. Semiconductor die assemblies may be formed using the methods.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: April 15, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Edmund Koon Tian Lua, Nam Yin Leng
  • Patent number: 7105930
    Abstract: Methods and apparatus for eliminating wire sweep and shorting while avoiding the use of under-bump metallization and high cost attendant to the use of conventional redistribution layers. An anisotropically conductive (z-axis) conductive layer in the form of a film or tape is applied to the active surface of a die and used as a base for conductive redistribution bumps formed on the anisotropically conductive layer, bonded to the ends of conductive columns thereof and wire bonded to the bond pads of the die. Packages so formed may be connected to substrates either with additional wire bonds extending from the conductive redistribution bumps to terminal pads or by flip-chip bonding using conductive bumps formed on the conductive redistribution bumps to connect to the terminal pads. The acts of the methods may be performed at the wafer level. Semiconductor die assemblies using the present invention are also disclosed.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: September 12, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Edmund Koon Tian Lua, Nam Yin Leng