Patents by Inventor Nan Jing
Nan Jing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12284458Abstract: Disclosed is a processing device, a system, a method for board writing display. The processing device comprises: an extraction unit to extract a first board-writing image from a first image frame in a video and a second board-writing image from a second image frame in the video; a supplement unit to determine an occlusion area of the second board-writing image based on a target object segmentation image of the second image frame, and replace the occlusion area of the second board-writing image with a corresponding area of the first board-writing image to obtain a third board-writing image; an output unit to generate an output image frame based on the second image frame and the third board-writing image, the output image frame presents an image with a target object located behind a transparentized board writing content. The present disclosure enables the board-writing data in the video to be presented completely.Type: GrantFiled: February 6, 2023Date of Patent: April 22, 2025Assignee: Beijing ESWIN Computing Technology Co., Ltd.Inventors: Weiqi Li, Gaosheng Wang, Nan Jing, Yuandong Huang, Andy Zhou
-
Publication number: 20250062218Abstract: A semiconductor device including a metal insulator metal capacitor (MIM capacitor) within back end of line circuitry of the semiconductor device, and an outer plate contact opening of an outer plate of the MIM capacitor, wherein a portion of an inner plate is removed, where portions of the outer plate are removed from corners of the outer plate opening. A metal insulator metal capacitor (MIM capacitor) within back end of line circuitry of the semiconductor device, and a non-rectangular contact opening of an outer plate of the MIM capacitor. Forming a metal insulator metal capacitor (MIM capacitor) within back end of line circuitry of the semiconductor device, and an outer plate contact opening of an outer plate of the MIM capacitor, where a portion of an inner plate is removed, where portions of the outer plate are removed from corners of the outer plate opening.Type: ApplicationFiled: August 15, 2023Publication date: February 20, 2025Inventors: ATSUSHI OGINO, Dureseti Chidambarrao, Baozhen Li, Matthew Stephen Angyal, Yueming Xu, Nan JING
-
Patent number: 11908888Abstract: A metal-insulator-metal (MIM) capacitor structure includes a substrate extending along a first direction to define a length, a second direction orthogonal to the first direction to define a width, and a third direction orthogonal to the first and second direction to define a height. The substrate includes a first capacitance region and a second capacitance region. The first capacitance region has a first maximum operating voltage (Vmax) and the second capacitance region has a second Vmax that is greater than the first Vmax.Type: GrantFiled: September 23, 2021Date of Patent: February 20, 2024Assignee: International Business Machines CorporationInventors: Baozhen Li, Chih-Chao Yang, Nan Jing, Huimei Zhou
-
Publication number: 20230351786Abstract: Disclosed is a board-writing extraction method and a related device. The board writing extraction method includes: obtaining a target object segmentation image of a writing-board image, wherein a contrast ratio between a target object and a non-target object in the target object segmentation image reaches a predetermined contrast ratio; converting, according to the target object segmentation image, a grayscale image of the writing-board image into a to-be-processed grayscale image with the board writing being highlighted; and performing binarization processing on the to-be-processed grayscale image to obtain a board-writing image of the writing-board image. The present disclosure can effectively reduce the noise in the board-writing image extracted from the writing-board image.Type: ApplicationFiled: February 2, 2023Publication date: November 2, 2023Inventors: Weiqi Li, Wei Hu, Gaosheng Wang, Nan Jing, Yuandong Huang, Andy Zhou
-
Publication number: 20230353702Abstract: Disclosed is a processing device, a system, a method for board writing display. The processing device comprises: an extraction unit to extract a first board-writing image from a first image frame in a video and a second board-writing image from a second image frame in the video; a supplement unit to determine an occlusion area of the second board-writing image based on a target object segmentation image of the second image frame, and replace the occlusion area of the second board-writing image with a corresponding area of the first board-writing image to obtain a third board-writing image; an output unit to generate an output image frame based on the second image frame and the third board-writing image, the output image frame presents an image with a target object located behind a transparentized board writing content. The present disclosure enables the board-writing data in the video to be presented completely.Type: ApplicationFiled: February 6, 2023Publication date: November 2, 2023Inventors: Weiqi Li, Gaosheng Wang, Nan Jing, Yuandong Huang, Andy Zhou
-
Publication number: 20230231707Abstract: Embodiments of the present invention are directed to methods and resulting structures for integrated circuits having metal-insulator-metal (MIM) capacitors that serve as both decoupling capacitors and crack stops. In a non-limiting embodiment, an interconnect is formed on a first portion of a substrate in an interior region of the integrated circuit. A second portion of the substrate is exposed in an edge region of the integrated circuit. A MIM capacitor is formed over the second portion of the substrate in the edge region. The MIM capacitor includes two or more plates and one or more dielectric layers. Each dielectric layer is positioned between an adjacent pair of the two or more plates and a portion of the two or more plates extends over the interconnect in the interior region. A plate of the two or more plates is electrically coupled to a last metal wiring level of the interconnect.Type: ApplicationFiled: March 27, 2023Publication date: July 20, 2023Inventors: Baozhen Li, Chih-Chao Yang, HUIMEI ZHOU, Nan JING
-
Patent number: 11676892Abstract: Embodiments of the present invention are directed to methods and resulting structures for integrated circuits having metal-insulator-metal (MIM) capacitors that serve as both decoupling capacitors and crack stops. In a non-limiting embodiment, an interconnect is formed on a first portion of a substrate in an interior region of the integrated circuit. A second portion of the substrate is exposed in an edge region of the integrated circuit. A MIM capacitor is formed over the second portion of the substrate in the edge region. The MIM capacitor includes two or more plates and one or more dielectric layers. Each dielectric layer is positioned between an adjacent pair of the two or more plates and a portion of the two or more plates extends over the interconnect in the interior region. A plate of the two or more plates is electrically coupled to a last metal wiring level of the interconnect.Type: GrantFiled: September 15, 2021Date of Patent: June 13, 2023Assignee: International Business Machines CorporationInventors: Baozhen Li, Chih-Chao Yang, Huimei Zhou, Nan Jing
-
Publication number: 20230088799Abstract: A metal-insulator-metal (MIM) capacitor structure includes a substrate extending along a first direction to define a length, a second direction orthogonal to the first direction to define a width, and a third direction orthogonal to the first and second direction to define a height. The substrate includes a first capacitance region and a second capacitance region. The first capacitance region has a first maximum operating voltage (Vmax) and the second capacitance region has a second Vmax that is greater than the first Vmax.Type: ApplicationFiled: September 23, 2021Publication date: March 23, 2023Inventors: Baozhen Li, Chih-Chao Yang, Nan Jing, Huimei Zhou
-
Publication number: 20230084798Abstract: Embodiments of the present invention are directed to methods and resulting structures for integrated circuits having metal-insulator-metal (MIM) capacitors that serve as both decoupling capacitors and crack stops. In a non-limiting embodiment, an interconnect is formed on a first portion of a substrate in an interior region of the integrated circuit. A second portion of the substrate is exposed in an edge region of the integrated circuit. A MIM capacitor is formed over the second portion of the substrate in the edge region. The MIM capacitor includes two or more plates and one or more dielectric layers. Each dielectric layer is positioned between an adjacent pair of the two or more plates and a portion of the two or more plates extends over the interconnect in the interior region. A plate of the two or more plates is electrically coupled to a last metal wiring level of the interconnect.Type: ApplicationFiled: September 15, 2021Publication date: March 16, 2023Inventors: Baozhen Li, Chih-Chao Yang, HUIMEI ZHOU, Nan JING
-
Patent number: 11437312Abstract: A metal insulator metal capacitor and method for fabricating a metal insulator metal capacitor (MIMcap) are disclosed. A first level metal pattern is embedded in a first dielectric layer over a substrate. The first level metal pattern has a top surface co-planar with a top surface of the first dielectric layer. In a selected etch step, either one of the first metal pattern or the first dielectric is etched to form a stepped top surface. A conformal insulating layer on the stepped top surface. The MIMcap is formed on the conformal insulating layer in a conformal manner.Type: GrantFiled: February 7, 2020Date of Patent: September 6, 2022Assignee: International Business Machines CorporationInventors: Jim Shih-Chun Liang, Naftali E Lustig, Atsushi Ogino, Nan Jing
-
Publication number: 20210249349Abstract: A metal insulator metal capacitor and method for fabricating a metal insulator metal capacitor (MIMcap) are disclosed. A first level metal pattern is embedded in a first dielectric layer over a substrate. The first level metal pattern has a top surface co-planar with a top surface of the first dielectric layer. In a selected etch step, either one of the first metal pattern or the first dielectric is etched to form a stepped top surface. A conformal insulating layer on the stepped top surface. The MIMcap is formed on the conformal insulating layer in a conformal manner.Type: ApplicationFiled: February 7, 2020Publication date: August 12, 2021Inventors: Jim Shih-Chun Liang, Naftali E Lustig, Atsushi Ogino, Nan Jing
-
Patent number: 8586316Abstract: A single molecule or molecule complex detection method is disclosed in certain aspects, comprising nano- or micro-fluidic channels.Type: GrantFiled: February 9, 2009Date of Patent: November 19, 2013Assignees: The Board of Regents of the University of Texas System, The Texas A&M University SystemInventors: Jun Kameoka, Nan Jing, Mien-chie Hung, Chao-Kai Chou
-
Publication number: 20120070846Abstract: A single molecule or molecule complex detection method is disclosed in certain aspects, comprising nano- or micro-fluidic channels.Type: ApplicationFiled: February 9, 2009Publication date: March 22, 2012Applicants: The Texas A&M University System, The Board of Regents of the University of Texas SystemInventors: Jun Kameoka, Nan Jing, Mien-chie Hung, Chao-Kai Chou
-
Publication number: 20090214392Abstract: A nano-fluidic trapping device and method of fabrication are disclosed. In one embodiment, a nano-fluidic trapping device for assembling a SERS-active cluster includes a substrate. The nano-fluidic trapping device further includes a SERS-active cluster compartment. The SERS-active cluster is formed in the SERS-active cluster compartment. In addition, the nano-fluidic trapping device includes a reservoir. The reservoir allows introduction of target molecules into the nano-fluidic trapping device. Moreover, the nano-fluidic trapping device includes a microchannel. The microchannel allows the target molecules to be introduced to the SERS-active cluster compartment from the reservoir. The nano-fluidic trapping device also includes a nanochannel. The SERS-active cluster compartment, the reservoir, the microchannel, and the nanochannel are disposed within the substrate.Type: ApplicationFiled: February 27, 2008Publication date: August 27, 2009Applicant: THE TEXAS A&M UNIVERSITY SYSTEMInventors: Jun Kameoka, Gerard L. Cote, Hope T. Beier, I-Hsien Chou, Melodie Benford, Miao Wang, Nan Jing
-
Patent number: 6401386Abstract: The subject invention provides materials and methods for the efficient and economical production of flowering plants from bulbs. Using the procedures described herein, it is possible to produce large numbers of healthy plants from bulbs or even seeds in a timely fashion. Specifically, bulbs or seeds are placed in at least one growth tray and stored in a cool environment. Such environment induces plant growth in roots and shoots. Once the roots and shoots of the plants form an interwoven cluster on the interior bottom surface of a growth tray, the plant clusters and the growth tray are removed from the cool environment and planted as a unit in soil to grow to maturity.Type: GrantFiled: September 23, 1999Date of Patent: June 11, 2002Inventor: Nan-Jing Ko
-
Patent number: 6127168Abstract: The subject invention provides inexpensive and convenient containers for holding a variety of substances. Although the containers of the subject invention are particularly well adapted for use in cell culture procedures, the versatile nature of these containers make them advantageous in a wide variety of applications.Type: GrantFiled: November 24, 1998Date of Patent: October 3, 2000Inventor: Nan-Jing Ko