Abstract: An electronic circuitry and an electronic device. The electronic circuitry includes a plurality of light-emitting components and a plurality of driving circuits corresponding to the light-emitting components. The driving circuit includes a transistor for delivering a driving signal to a corresponding light-emitting component, a detecting unit for providing a detecting output in response to the corresponding light-emitting component, and a feedback-control unit for directing the transistor to regulate the driving signal in response to the detecting output.

Abstract: A method for determining natural illumination duration and an electronic device are provided, to more accurately determine a scenario in which a user is located and effectively determine natural illumination duration, to help the user improve vision. The method is applied to an electronic device having a display screen and includes: determining a current scenario based on a preset reference factor (S901), where the preset reference factor includes any one or more of ultraviolet intensity, illumination intensity, and locating signal strength; and counting current natural illumination duration towards cumulative natural illumination duration if the current scenario is a preset scenario (S902), where the preset scenario includes any one or more of an outdoor scenario, an indoor near-window scenario, and an outdoor blocked scenario.

Abstract: One example blood pressure measurement device includes a body, a wrist strap, an airbag, an air supply and exhaust apparatus, a first sensor, and a second sensor. The airbag has an air cavity, and the airbag is connected to the body. The body includes a cavity, and the air supply and exhaust apparatus is disposed in the cavity. The air supply and exhaust apparatus includes an air intake path and an air exhaust path, and the air supply and exhaust apparatus communicates with the air cavity of the air bag. The first sensor is configured to measure an air pressure value in the air cavity. The second sensor is located on a same side of the wrist strap as the airbag, and is configured to measure a pulse wave signal.

Abstract: A transistor structure includes a gate conductive region, a gate dielectric region, a channel region and a drain region. The gate conductive region is below an original surface of a substrate. The gate dielectric region surrounds the gate conductive region. The channel region surrounds the gate dielectric region. The drain region is horizontally spaced apart from the gate conductive region, wherein the drain region includes a highly doped region; wherein the gate dielectric region includes a first dielectric portion and a second dielectric portion, the first dielectric portion is positioned between the gate conductive region and the highly doped region, and the second dielectric portion is positioned between the gate conductive region and the channel region; wherein a horizontal thickness of the first dielectric portion is greater than that of the second dielectric portion.

Abstract: A display device includes a display structure having a display surface and an actuator mechanism. The actuator mechanism drives the display structure travels along a motion path with a periodic cycle.

Abstract: A memory cell structure includes a silicon substrate, a transistor, and a capacitor. The silicon substrate has a silicon surface. The transistor is coupled to the silicon surface, the transistor includes a gate structure, a first conductive region, and a second conductive region. The capacitor has a signal electrode and a counter electrode, the capacitor is over the transistor, and the signal electrode is electrically coupled to the second conductive region of the transistor and isolated from the first conductive region of the transistor. The counter electrode includes a plurality of sub-electrodes electrically connected with each other.

Abstract: A memory structure includes a semiconductor substrate, an active region, a transistor, and a buried-WL (word line). The semiconductor substrate has an original semiconductor surface. The active region is in the semiconductor substrate and surrounded by a shallow trench isolation (STI) region. The transistor is formed based on the active region. The buried-WL (word line) extends through the active region and the STI region. The buried-WL has variable depth or width along the extension direction of the buried-WL.

Abstract: The invention relates to a 2-isopropyl malate synthase, a genetically engineered bacterium for producing L-leucine and application thereof and belongs to the field of metabolic engineering. The genetically engineered bacterium is obtained by overexpressing an isopropyl malate synthase coding gene leuAM for relieving feedback inhibition by L-leucine, an acetohydroxy acid synthase coding gene ilvBNM for relieving feedback inhibition by L-isoleucine, a 3-isopropyl malate dehydrogenase coding gene leuB and a 3-isopropyl malate dehydratase coding gene leuCD in host cells. The genetically engineered bacterium for producing the L-leucine is free from nutritional deficiency, rapid in growth, short in fermentation period, high in yield and high in conversion rate.

Abstract: A transistor structure includes a semiconductor substrate, a gate region a spacer, a first trench, a first isolation region and a conductive region. The semiconductor substrate has an active region which has a semiconductor surface. The gate region has a first conductive portion over the semiconductor surface of the semiconductor substrate in the active region and a second conductive portion over the first conductive portion. The spacer covers a sidewall of the gate region. The first trench is formed below the semiconductor surface of the semiconductor substrate in the active region. The first isolation region is in the first trench. The conductive region is positioned on the first isolating region. Wherein a lateral length of the first conductive portion is greater than that of the second conductive portion.

Abstract: A pumping system includes a motor and a drive shaft configured for rotation by the motor. The pumping system includes an upper pump positioned above the motor, an upper pump shaft and an upper directional coupling connected between the drive shaft and the upper pump shaft. The upper directional coupling is configured to lock the upper pump shaft to the drive shaft when the drive shaft is rotated in a first direction. The pumping system further includes a lower pump positioned below the motor, a lower pump shaft, and a lower directional coupling connected between the drive shaft and the lower pump shaft. The lower directional coupling is configured to lock the lower pump shaft to the drive shaft when the drive shaft is rotated in a second direction.

Abstract: The present invention provides an audio recording method and an associated audio processing circuit. The recording method includes performing an initialization of an audio processing circuit at a first timing, setting a gain of the audio processing circuit to a first value at a second timing, using the audio processing circuit to start recording at a third timing, completing the initialization of the audio processing circuit at a fourth timing, and adjusting the gain of the audio processing circuit to a second value at a fifth timing. The second value is greater than the first value, the first timing and the second timing are earlier than the third timing, the fourth timing is later than the third timing, and the fifth timing is later than the third timing.

Abstract: A storage system determines that it is undergoing intensive reads by a host, which can occur, for example, when the storage system is being used to play a video game for a prolonged period of time. As performing a conventional read scrub operation in that situation can result in a decrease in performance, the storage system can instead use a targeted read scrub operation to reduce the impact on host read performance. The targeted read scrub operation can take the form, for example, of a periodic read scan on areas of the memory that are not part of the intensive host read, random read scans on neighboring wordlines where only a single state is read, and/or a passive read scan where acceptable but risky pages are marked for relocation.

Abstract: A storage system determines that it is undergoing intensive reads by a host, which can occur, for example, when the storage system is being used to play a video game for a prolonged period of time. As performing a conventional read scrub operation in that situation can result in a decrease in performance, the storage system can instead use a targeted read scrub operation to reduce the impact on host read performance. The targeted read scrub operation can take the form, for example, of a periodic read scan on areas of the memory that are not part of the intensive host read, random read scans on neighboring wordlines where only a single state is read, and/or a passive read scan where acceptable but risky pages are marked for relocation.

Abstract: A circuit includes: a first electrical interface including a first pin, a resistor module, an alternating current signal source, a voltage detection module, and a controller. One end of the resistor module is electrically connected to the first pin. The alternating current signal source is electrically connected to the other end of the resistor module, and configured to generate an alternating current detection signal. The voltage detection module is connected to the first pin, and configured to detect a maximum voltage value and a minimum voltage value that are on the first pin within a period of the alternating current detection signal. The controller is separately connected to the alternating current signal source and the voltage detection module, and configured to, when a difference between the maximum voltage value and the minimum voltage value is less than a first threshold, determine that water enters the first electrical interface.

Abstract: An electronic gaming system including a plurality of electronic gaming devices and a progressive controller in communication with the plurality of electronic gaming devices is described. The progressive controller causes display of a number of linked progressive free spins at each electronic gaming device of the plurality of electronic gaming devices and determines, during an electronic game, that a progressive symbol is displayed on a display device of at least one electronic gaming device of the plurality of electronic gaming devices. The progressive controller also causes the number of linked progressive free spins to be increased to an updated number of linked progressive free spins and, based upon the updated number of linked progressive free spins, causes display of the updated number of linked progressive free spins at each electronic gaming device of the plurality of electronic gaming devices.

Abstract: A transistor structure includes a gate conductive region, a gate dielectric region, a channel region and a drain region. The gate conductive region is below an original surface of a substrate. The gate dielectric region surrounds the gate conductive region. The channel region surrounds the gate dielectric region. The drain region is horizontally spaced apart from the gate conductive region, wherein the drain region includes a highly doped region; wherein the gate dielectric region includes a first dielectric portion and a second dielectric portion, the first dielectric portion is positioned between the gate conductive region and the highly doped region, and the second dielectric portion is positioned between the gate conductive region and the channel region; wherein a horizontal thickness of the first dielectric portion is greater than that of the second dielectric portion.

Abstract: A data storage device including, in one implementation, a non-volatile memory and a controller. The non-volatile memory includes a memory block. The memory block includes a plurality of word lines that are written sequentially from a first end of the memory block to a second end of the memory block. The controller is coupled to the non-volatile memory. The controller is configured to determine a last written word line of the memory block. The controller is also configured to set a non-selected word line voltage based on the last written word line of the memory block. The controller is further configured to apply the non-selected word line voltage to non-selected word lines of the memory block.

Abstract: A control method for a storage device of a driving recorder includes: configuring a directory entry of a storage device according to a predetermined directory entry stored in a storage unit; configuring a file allocation table of the storage device according to a predetermined file allocation table stored in the storage unit; and controlling a controller to write data to the storage device according to the directory entry and the file allocation table. In one embodiment, entries of the predetermined file allocation table are interleaved to accommodate multiple files and still support a continuous write operation.

Abstract: A smart wearable device includes a display screen, a rear cover that engages with the display screen, a light generator, and a light receiver. The light generator and the light receiver are disposed in a mounting cavity formed after the display screen engages with the rear cover, the light generator is configured to emit light to an outer side of the rear cover, the light receiver is configured to receive light transmitted from the outer side of the rear cover, the light generator is disposed on a first control panel, the light receiver is disposed on a second control panel, and the light generator is disposed closer to the rear cover than the light receiver.

Abstract: A data storage device including, in one implementation, a non-volatile memory and a controller. The non-volatile memory includes a memory block. The memory block includes a plurality of word lines that are written sequentially from a first end of the memory block to a second end of the memory block. The controller is coupled to the non-volatile memory. The controller is configured to determine a last written word line of the memory block. The controller is also configured to set a non-selected word line voltage based on the last written word line of the memory block. The controller is further configured to apply the non-selected word line voltage to non-selected word lines of the memory block.