Patents by Inventor Nan Ma

Nan Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120276370
    Abstract: A coated article is described. The coated article includes an aluminum or aluminum alloy substrate and a compound corrosion resistant layer formed on the substrate. The compound corrosion resistant layer includes a plurality of first non-crystalline films and an equal number of second non-crystalline films. Each the first non-crystalline film interleaves with each the second non-crystalline film. The first non-crystalline film is an aluminum nitride film or an aluminum oxide film. The second non-crystalline film is a silicon nitride film or a silicon dioxide film. A method for making the coated article is also described.
    Type: Application
    Filed: July 11, 2011
    Publication date: November 1, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: HSIN-PEI CHANG, WEN-RONG CHEN, HUANN-WU CHIANG, CHENG-SHI CHEN, NAN MA
  • Patent number: 8293345
    Abstract: A device housing is described. The device housing includes an aluminum alloy substrate and a compound corrosion resistant layer formed on the substrate. The compound corrosion resistant layer includes two crystalline films and a non-crystalline film formed between the crystalline films. One of the crystalline films is formed on the substrate. The crystalline film is a chromium-oxygen-nitrogen film or an aluminum-oxygen-nitrogen film. The non-crystalline film is an aluminum oxide film or a silicon dioxide film. A method for making the device housing is also described.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: October 23, 2012
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Hsin-Pei Chang, Wen-Rong Chen, Huann-Wu Chiang, Cheng-Shi Chen, Nan Ma
  • Publication number: 20120251746
    Abstract: A device housing is described. The device housing includes an aluminum alloy substrate and a compound corrosion resistant layer formed on the substrate. The compound corrosion resistant layer includes two crystalline films and a non-crystalline film formed between the crystalline films. One of the crystalline films is formed on the substrate. The crystalline film is a chromium-oxygen-nitrogen film or an aluminum-oxygen-nitrogen film. The non-crystalline film is an aluminum oxide film or a silicon dioxide film. A method for making the device housing is also described.
    Type: Application
    Filed: August 23, 2011
    Publication date: October 4, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: HSIN-PEI CHANG, WEN-RONG CHEN, HUANN-WU CHIANG, CHENG-SHI CHEN, NAN MA
  • Publication number: 20120231292
    Abstract: A coated article is described. The coated article includes an aluminum or aluminum alloy substrate, a combined gradient layer formed on the substrate, and a decorative layer formed on the combined gradient layer. The combined gradient layer includes a plurality of aluminum-oxygen-nitrogen layers. The atomic percentage of aluminum atoms within the combined gradient layer is gradually decreased from near the substrate to far away the substrate, the atomic percentages of oxygen atoms and nitrogen atoms within the combined gradient layer are gradually increased from near the substrate to far away the substrate. The decorative layer is a non-metallic layer. A method for making the coated article is also described.
    Type: Application
    Filed: July 8, 2011
    Publication date: September 13, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: HSIN-PEI CHANG, WEN-RONG CHEN, HUANN-WU CHIANG, CHENG-SHI CHEN, NAN MA
  • Publication number: 20120164460
    Abstract: A coated article is described. The coated article includes an aluminum or aluminum alloy substrate and a corrosion resistant layer formed on the substrate. The corrosion resistant layer is a compound silicon-chromium-nitrogen layer. A method for making the coated article is also described.
    Type: Application
    Filed: June 27, 2011
    Publication date: June 28, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD
    Inventors: HSIN-PEI CHANG, WEN-RONG CHEN, HUANN-WU CHIANG, CHENG-SHI CHEN, NAN MA
  • Publication number: 20120164459
    Abstract: A coated article is described. The coated article includes an aluminum or aluminum alloy substrate and a corrosion resistant layer formed on the substrate. The corrosion resistant layer is a compound silicon-titanium-nitrogen layer. A method for making the coated article is also described.
    Type: Application
    Filed: June 27, 2011
    Publication date: June 28, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO.,LTD.
    Inventors: HSIN-PEI CHANG, WEN-RONG CHEN, HUANN-WU CHIANG, CHENG-SHI CHEN, NAN MA
  • Publication number: 20120148866
    Abstract: A coated article is described. The coated article includes a metal substrate and a hard coating formed on the substrate. The hard coating is a chromium nitride-silicon nitride compound layer. A method for applying the hard coating to the metal substrate is also described.
    Type: Application
    Filed: June 27, 2011
    Publication date: June 14, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: HSIN-PEI CHANG, WEN-RONG CHEN, HUANN-WU CHIANG, CHENG-SHI CHEN, NAN MA
  • Publication number: 20120121895
    Abstract: An aluminum or aluminum alloy article is described. The aluminum or aluminum alloy article includes an aluminum or aluminum alloy substrate, a color layer formed on the substrate, and an insulation layer formed on the color layer. The color layer is formed by vacuum sputtering. The insulation layer is an external layer of the aluminum or aluminum article.
    Type: Application
    Filed: July 5, 2011
    Publication date: May 17, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: HSIN-PEI CHANG, WEN-RONG CHEN, HUANN-WU CHIANG, CHENG-SHI CHEN, NAN MA
  • Publication number: 20110278554
    Abstract: Embodiments of the present disclosure include hybrid quantum dot/protein nanostructure, hybrid quantum dot/protein nanostructure systems, methods of using hybrid quantum dot/protein nanostructures, and the like.
    Type: Application
    Filed: May 4, 2011
    Publication date: November 17, 2011
    Applicant: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Nan Ma, Jianghong Rao
  • Patent number: 7881186
    Abstract: This invention relates to a method for protecting high layer service in the multi-layer communication equipment, include that low layer processing module which provides low layer transmission passages for high layer processing module, and high layer processing module which sets up transparent VP link passage from up and down node by the service of said module, in order to make the service processed by the said module avoid influence. Once detecting the fault of the said processing module, high layer processing module will message the low layer processing module, and the low layer processing module will set up bypass connection after detecting the fault of the high layer processing module, then isolate the failed high layer process module. According to the present invention, extra network passages are not necessary, the means of protecting network is not limited. The present invention aims to protect effectively ATM traffic when the processing ability of ATM layer invalidate between MSPP and MSTP.
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: February 1, 2011
    Assignee: ZTE Corporation
    Inventors: Huan nan Ma, Qing Li, Min Zhu, Pei hua Zhang, Nan xi Su
  • Patent number: 7333516
    Abstract: The present invention provides an interface and method for synchronous data transfer between domains clocked at different frequencies. The interface includes a first latch for receiving data from a first domain clocked at one frequency when the first latch is selected and a second latch for receiving data from the first domain when the second latch is selected. A third latch is provided for transferring data from either the first latch or the second latch to the second domain when the second domain is clocked.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: February 19, 2008
    Assignee: Silicon Graphics, Inc.
    Inventors: Mark Ronald Sikkink, William A. Huffman, Vernon W. Swanson, Nan Ma, Randal S. Passint
  • Patent number: 7248635
    Abstract: The present invention is directed toward a communications channel comprising a link level protocol, a driver, a receiver, and a canceller/equalizer. The link level protocol provides logic for DC-free signal encoding and recovery as well as supporting many features including CRC error detection and message resend to accommodate infrequent bit errors across the medium. The canceller/equalizer provides equalization for destabilized data signals and also provides simultaneous bi-directional data transfer. The receiver provides bit deskewing by removing synchronization error, or skewing, between data signals. The driver provides impedance controlling by monitoring the characteristics of the communications medium, like voltage or temperature, and providing a matching output impedance in the signal driver so that fewer distortions occur while the data travels across the communications medium.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: July 24, 2007
    Assignee: Silicon Graphics, Inc.
    Inventors: Michael R. Arneson, Terrance L. Bowman, Frank N. Cornett, John F. DeRyckere, Brian T. Hillert, Philip N. Jenkins, Nan Ma, Joseph M. Placek, Rodney Ruesch, Gregory M. Thorson
  • Patent number: 7205387
    Abstract: The invention provides a novel recombinant polypeptide that comprises a nucleic acid binding element and a hairpin motif that selectively binds to a neurotrophin receptor. The recombinant polypeptide may be used for neurotrophin receptor mediated delivery of nucleic acid, including therapeutic DNA, bound to the recombinant polypeptide. In one embodiment, the hairpin motif is a hairpin motif of a neurotrophin, such as nerve growth factor, brain derived neurotrophic factor, neurotrophin 3 and neurotrophin 4/5. The hairpin motif is also a neurotrophin agonist and therefore may be used to treat any disorder responsive to neurotrophin treatment, such as neurological disorders and tumour. In one embodiment the agonist comprises a hairpin motif that selectively binds to a neurotrophin receptor and a positively charged binding domain which is believed to enhance receptor binding by binding to negatively charged cell membrane.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: April 17, 2007
    Assignee: Agency for Science, Technology and Research
    Inventors: Shu Wang, Shan Shan Wu, Jieming Zeng, Nan Ma
  • Publication number: 20060165805
    Abstract: A magnetic pole matrix chip facilitating the grinding of magnetic particles carrying matter effective for treating a disease or promoting tissue engineering to a disease site or a tissue engineering site, respectively
    Type: Application
    Filed: December 22, 2005
    Publication date: July 27, 2006
    Inventors: Gustav Steinhoff, Kurt Steinhoff, Wenzhong Li, Nan Ma
  • Publication number: 20050220141
    Abstract: This invention relates to a method for protecting high layer service in the multi-layer communication equipment, include that low layer processing module which provides low layer transmission passages for high layer processing module, and high layer processing module which sets up transparent VP link passage from up and down node by the service of said module, in order to make the service processed by the said module avoid influence. Once detecting the fault of the said processing module, high layer processing module will message the low layer processing module, and the low layer processing module will set up bypass connection after detecting the fault of the high layer processing module, then isolate the failed high layer process module. According to the present invention, extra network passages are not necessary, the means of protecting network is not limited. The present invention aims to protect effectively ATM traffic when the processing ability of ATM layer invalidate between MSPP and MSTP.
    Type: Application
    Filed: July 17, 2003
    Publication date: October 6, 2005
    Inventors: Huan nan Ma, Oing Li, Min Zhu, Pei Zhang, Nan Su
  • Patent number: 6920526
    Abstract: The present invention comprises a dual bank FIFO memory buffer operable to buffer read data from memory and thereby compensate for specific timing problems in certain computerized systems. One embodiment of the invention includes a dual bank FIFO that comprises a first bank of memory elements operable to buffer memory data and a second bank of memory elements operable to buffer memory data. Write control address logic is operable to store selected memory data in memory elements with selected addresses within a bank of memory elements, and write control timing logic is operable to selectively grant write access to the banks of memory elements at predetermined time. Also, read control logic operable to read data stored in the first and second banks.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: July 19, 2005
    Assignee: Silicon Graphics, Inc.
    Inventors: Mark Ronald Sikkink, Nan Ma
  • Publication number: 20050048606
    Abstract: The invention provides a novel recombinant polypeptide that comprises a nucleic acid binding element and a hairpin motif that selectively binds to a neurotrophin receptor. The recombinant polypeptide may be used for neurotrophin receptor mediated delivery of nucleic acid, including therapeutic DNA, bound to the recombinant polypeptide. In one embodiment, the hairpin motif is a hairpin motif of a neurotrophin, such as nerve growth factor, brain derived neurotrophic factor, neurotrophin 3 and neurotrophin 4/5. The hairpin motif is also a neurotrophin agonist and therefore may be used to treat any disorder responsive to neurotrophin treatment, such as neurological disorders and tumour. In one embodiment the agonist comprises a hairpin motif that selectively binds to a neurotrophin receptor and a positively charged binding domain which is believed to enhance receptor binding by binding to negatively charged cell membrane.
    Type: Application
    Filed: August 28, 2003
    Publication date: March 3, 2005
    Inventors: Shu Wang, Shan Wu, Jieming Zeng, Nan Ma
  • Patent number: 6703908
    Abstract: There is disclosed apparatus and apparatus for impedance control to provide for controlling the impedance of a communication circuit using an all-digital impedance control circuit wherein one or more control bits are used to tune the output impedance. In one example embodiment, the impedance control circuit is fabricated using circuit components found in a standard macro library of a computer aided design system. According to another example embodiment, there is provided a control for an output driver on an integrated circuit (“IC”) device to provide for forming a resistor divider network with the output driver and a resistor off the IC device so that the divider network produces an output voltage, comparing the output voltage of the divider network with a reference voltage, and adjusting the output impedance of the output driver to attempt to match the output voltage of the divider network and the reference voltage.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: March 9, 2004
    Assignee: Silicon Graphic, Inc.
    Inventors: Rodney Ruesch, Philip N. Jenkins, Nan Ma
  • Patent number: 6518812
    Abstract: A composite delay line includes a first and a second delay line connected to a multiplexer. The multiplexer has a first and a second input. The first delay line includes an input, an output and first control means for controlling delay. The second delay line includes an input, an output and second control means for controlling delay. The output of each delay line is connected to the input of the multiplexer. Control logic connected to the first control means selects a delay through the first delay line. Control logic connected to the second control means selects a delay through the second delay line. Control logic connected to the multiplexer selects between the output of the first delay line and the second delay line.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: February 11, 2003
    Assignee: Silicon Graphics, Inc.
    Inventors: Mark Ronald Sikkink, Nan Ma