Abstract: Provided is a low noise amplification circuit, comprising: a RF amplification circuit, one end of which is connected with a signal input end, another end is connected with the output impedance matching circuit; an output impedance matching circuit, one end of which is connected with the RF amplification circuit, another end is connected with the attenuation network; an attenuation network, one end of which is connected with the output impedance matching circuit, another end is connected with a signal output end; a passive attenuation path, one end of which is connected with the signal input end, another end is connected with a connection node between the matching circuit and the network; and an impedance regulation network, configured to, in a first working mode, resonate with a parasitic capacitance generated by the network, in a second working mode, resonate with a parasitic capacitance generated by the network and the attenuation path.

Abstract: An amplifier system including a push-pull power amplifier having an input to receive a radio frequency (RF) input signal and an output, the push-pull power amplifier being configured to amplify the RF input signal and provide at the output an RF output signal that is an amplified version of the RF input signal, a switchable shunt capacitance switchably connected between a load-line connected to the output of the push-pull power amplifier and a reference potential, and a switch configured to selectively connect the switchable shunt capacitance to the reference potential and disconnect the switchable shunt capacitance from the reference potential to vary an impedance of load-line.

Abstract: Provided are an RF front-end architecture, an antenna device and a communication terminal. The RF front-end architecture comprises a primary RF front-end module and a secondary RF front-end module. The communication terminal optimizes the RF front-end architecture on the internal antenna device, and is able to work in a multi-antenna working mode to realize the receiving and transmission of multiplex RF signals. The architecture is relatively simple in structure, only two RF front-end modules are needed to realize multiplex transmission and multiplex receiving of RF signals, meanwhile, different frequency band signals which need to be accessed can be flexibly controlled and adjusted. Moreover, the low noise amplifiers in the architecture all support the amplification of multi-band frequency signals, which can ensure the realization of 1T4R, 2T4R and other functions in fewer RF front-end modules, ensure the realization of rich function of the architecture, and reduce the area of the architecture.

Abstract: Provided are a PA output matching circuit, a RF front-end module and a wireless device. The circuit is used for connecting with a first PA output and a second PA output of an output stage of a push-pull PA, and comprises a load balun, a first DC blocking circuit, a second DC blocking circuit, a first feed circuit and a second feed circuit; the main coil of the load balun is provided with a first balun input and a second balun input; the first balun input is connected with the first PA output via the first DC blocking circuit, and the first balun input is connected with the first PA output via the first feed circuit; the second balun input is connected with the second PA output via the second DC blocking circuit, and the second balun input is connected with the second PA output via the second feed circuit.

Abstract: Technologies for balancing throughput across input ports include a network switch. The network switch is to generate, for an arbiter unit in a first stage of a hierarchy of stages of arbiter units, turn data indicative of a set of turns in which to transfer packet data from devices connected to input ports of the arbiter unit. The network switch is also to transfer, with the arbiter unit, the packet data from the devices in the set of turns. Additionally, the network switch is to determine weight data indicative of the number of turns represented in the set and provide the weight data from the arbiter unit in the first stage to another arbiter unit in a subsequent stage to cause the arbiter unit in the subsequent stage to allocate a number of turns for the transfer of the packet data from the arbiter unit in the first stage.

Abstract: An amplifier system including a push-pull power amplifier having an input to receive a radio frequency (RF) input signal and an output, the push-pull power amplifier being configured to amplify the RF input signal and provide at the output an RF output signal that is an amplified version of the RF input signal, a switchable shunt capacitance switchably connected between a load-line connected to the output of the push-pull power amplifier and a reference potential, and a switch configured to selectively connect the switchable shunt capacitance to the reference potential and disconnect the switchable shunt capacitance from the reference potential to vary an impedance of load-line.

Abstract: A head-up display system includes a display unit and a reflective element. The display unit having a first and a second display areas includes a display panel, a first light source module, and a second light source module. The display panel has a first and a second pixel areas. The first and the second light source modules respectively provide a first and a second light sources. The first light source corresponds to the first pixel area to make the first display area display a first image frame. The second light source corresponds to the second pixel area to make the second display area display a second image frame. The reflective element is located on a transmission path of the first image frame and not located on a transmission path of the second image frame, and reflects the first image frame from the first display area to a target element.

Abstract: Technologies for balancing throughput across input ports include a network switch. The network switch is to generate, for an arbiter unit in a first stage of a hierarchy of stages of arbiter units, turn data indicative of a set of turns in which to transfer packet data from devices connected to input ports of the arbiter unit. The network switch is also to transfer, with the arbiter unit, the packet data from the devices in the set of turns. Additionally, the network switch is to determine weight data indicative of the number of turns represented in the set and provide the weight data from the arbiter unit in the first stage to another arbiter unit in a subsequent stage to cause the arbiter unit in the subsequent stage to allocate a number of turns for the transfer of the packet data from the arbiter unit in the first stage.

Abstract: A model-based virtual power management driven multi-chip system simulator generates utilization data and performance data with a workload model that models one or more types of workloads based on parameters that characterize the one or more types of workloads. The simulator generates thermal data and power consumption data with a power model that models power consumption at a chip-level and a system-level. The simulator then generates performance counter information with a performance model that models change of performance counters over time and at least one of the generated utilization data and the generated performance data as input to the performance model. The simulator provides this generated data as input to a driver of the simulator.

Abstract: A head-up display system includes a display unit and a reflective element. The display unit having a first and a second display areas includes a display panel, a first light source module, and a second light source module. The display panel has a first and a second pixel areas. The first and the second light source modules respectively provide a first and a second light sources. The first light source corresponds to the first pixel area to make the first display area display a first image frame. The second light source corresponds to the second pixel area to make the second display area display a second image frame. The reflective element is located on a transmission path of the first image frame and not located on a transmission path of the second image frame, and reflects the first image frame from the first display area to a target element.

Abstract: A model-based virtual power management driven multi-chip system simulator generates utilization data and performance data with a workload model that models one or more types of workloads based on parameters that characterize the one or more types of workloads. The simulator generates thermal data and power consumption data with a power model that models power consumption at a chip-level and a system-level. The simulator then generates performance counter information with a performance model that models change of performance counters over time and at least one of the generated utilization data and the generated performance data as input to the performance model. The simulator provides this generated data as input to a driver of the simulator.

Abstract: A model-based virtual power management driven multi-chip system simulator generates utilization data and performance data with a workload model that models one or more types of workloads based on parameters that characterize the one or more types of workloads. The simulator generates thermal data and power consumption data with a power model that models power consumption at a chip-level and a system-level. The simulator then generates performance counter information with a performance model that models change of performance counters over time and at least one of the generated utilization data and the generated performance data as input to the performance model. The simulator provides this generated data as input to a driver of the simulator.

Abstract: The invention provides a projector and a brightness adjusting method thereof. The projector includes a light source module, a color wheel module, a brightness adjusting device, and a brightness processing module. The light source module is used for emitting a light beam. The color wheel module is used for being excited to generate at least one color light beam by the light beam emitted from the light source module. The brightness adjusting device includes a light sensor and a brightness processing module, wherein the light sensor is disposed on a transmission path of a portion of the color light beam and the brightness processing module is electrically connected to the light sensor for adjusting the brightness value of the color light beam. The brightness adjusting method of projector is also provided.

Abstract: A dual-personality extended USB (EUSB) system supports both USB and EUSB devices using an extended 9-pin EUSB socket. Each EUSB device includes a PCBA having four standard USB metal contact pads, and several extended purpose contact springs disposed on an upper side of a PCB. A single-shot molding process is used to form a molded housing over passive components and IC dies disposed on the lower PCB surface. The passive components are mounted using SMT methods, and the IC dies are mounted using COB methods. The extended 9-pin EUSB socket includes standard USB contacts and extended use contacts that communicate with the PCBA through the standard USB metal contacts and the contact springs. The EUSB device is optionally used as a modular insert that is mounted onto a metal or plastic case to provide a EUSB assembly having a plug shell similar to a standard USB male connector.

Abstract: The invention provides a projector and a brightness adjusting method thereof. The projector includes a light source module, a color wheel module, a brightness adjusting device, and a brightness processing module. The light source module is used for emitting a light beam. The color wheel module is used for being excited to generate at least one color light beam by the light beam emitted from the light source module. The brightness adjusting device includes a light sensor and a brightness processing module, wherein the light sensor is disposed on a transmission path of a portion of the color light beam and the brightness processing module is electrically connected to the light sensor for adjusting the brightness value of the color light beam. The brightness adjusting method of projector is also provided.

Abstract: A dual-personality extended USB (EUSB) system supports both USB and EUSB devices using an extended 9-pin EUSB socket. Each EUSB device includes a PCBA having four standard USB metal contact pads, and several extended purpose contact springs disposed on an upper side of a PCB. A single-shot molding process is used to form a molded housing over passive components and IC dies disposed on the lower PCB surface. The passive components are mounted using SMT methods, and the IC dies are mounted using COB methods. The extended 9-pin EUSB socket includes standard USB contacts and extended use contacts that communicate with the PCBA through the standard USB metal contacts and the contact springs. The EUSB device is optionally used as a modular insert that is mounted onto a metal or plastic case to provide a EUSB assembly having a plug shell similar to a standard USB male connector.

Abstract: A dual-personality extended USB (EUSB) system supports both USB and EUSB devices using an extended 9-pin EUSB socket. Each EUSB device includes a PCBA having four standard USB metal contact pads, and several extended purpose contact springs disposed on an upper side of a PCB. A single-shot molding process is used to form a molded housing over passive components and IC dies disposed on the lower PCB surface. The passive components are mounted using SMT methods, and the IC dies are mounted using COB methods. The extended 9-pin EUSB socket includes standard USB contacts and extended use contacts that communicate with the PCBA through the standard USB metal contacts and the contact springs. The EUSB device is optionally used as a modular insert that is mounted onto a metal or plastic case to provide a EUSB assembly having a plug shell similar to a standard USB male connector.

Abstract: A model-based virtual power management driven multi-chip system simulator generates utilization data and performance data with a workload model that models one or more types of workloads based on parameters that characterize the one or more types of workloads. The simulator generates thermal data and power consumption data with a power model that models power consumption at a chip-level and a system-level. The simulator then generates performance counter information with a performance model that models change of performance counters over time and at least one of the generated utilization data and the generated performance data as input to the performance model. The simulator provides this generated data as input to a driver of the simulator.

Abstract: A model-based virtual power management driven multi-chip system simulator generates utilization data and performance data with a workload model that models one or more types of workloads based on parameters that characterize the one or more types of workloads. The simulator generates thermal data and power consumption data with a power model that models power consumption at a chip-level and a system-level. The simulator then generates performance counter information with a performance model that models change of performance counters over time and at least one of the generated utilization data and the generated performance data as input to the performance model. The simulator provides this generated data as input to a driver of the simulator.

Abstract: A pen-type computer peripheral device includes an elongated housing containing a PCBA having a plug connector, and cap/cover that is slidably connected to a front portion of the housing. Locking structures are respectively integrally molded onto opposing surfaces of the housing and cap/cover that cooperate to prevent separation of the cap/cover from the housing. By manually pushing (sliding) the cap/cover relative to the housing, the plug connector is effectively moved between a retracted position, in which the plug connector is disposed inside the cap/cover, and a deployed position in which the plug connector extends through a front housing opening of the cap/cover such that the plug connector is operably exposed for insertion into a host system.