Abstract: In embodiments of the present disclosure, there is provided an approach for fact checking based on semantic graphs. According to embodiments of the present disclosure, after obtaining a text to be fact checked, a plurality of evidence sentences related to the text are retrieved from an evidence database. Then, semantic graphs of the text and the evidence sentences are constructed based on the semantic analysis, and a veracity of a statement in the text can be determined based on the semantic graphs. Embodiments of the present disclosure propose a graph-based reasoning approach for fact checking, and use the constructed semantic graphs to facilitate verification of the truthfulness of the text, thereby improving the accuracy for fact checking.

Abstract: Disclosed is the use of Belinostat or a pharmaceutically acceptable salt thereof in preparation of a drug for treating an infection. Also disclosed are related methods and compositions.

Abstract: A cell clump dispersing device for dispersing cell clumps is provided, including a dispersion structure module that includes at least one structure for providing fluid flow shear force. Each structure for providing liquid flow shear force includes an inlet for cell clumps to be dispersed to enter the structure, and at least one outlet for dispersed cell clumps to flow out of the structure. A diameter of the outlet is smaller than that of the inlet, and an end of at least one of the structure is capable of being connected to an end of another of the structure.

Abstract: Methods and systems for generating embeddings from molecular graphs, which may be used for classification of candidate molecules. A physical model is used to generate a set of task-relevant feature vectors, representing local physical features of the molecular graph. A trained embedding generator is used to generate a set of task-relevant structural embeddings representing connectivity among the set of vertices and task-relevant features of the set of vertices. The task-relevant feature vectors are combined with the task-relevant structural embeddings and provided as input to a trained classifier. The trained classifier generates a predicted class label representing a classification of the candidate molecule.

Abstract: Disclosed is the use of Belinostat or a pharmaceutically acceptable salt thereof in preparation of a drug for treating an infection. Also disclosed are related methods and compositions.

Abstract: In a crop identification method, multi-temporal sample remote sensing images labeled with first planting blocks of a specific crop are acquired. NDVI data of the sample remote sensing images are calculated. Noise of the NDVI data is reduced. A first multivariate Gaussian model is fitted based on de-noised NDVI data of the sample remote sensing image. Multi-temporal target remote sensing images are acquired. An NDVI time series of each pixel in the target remote sensing image is constructed. The NDVI time series is input to the first multivariate Gaussian model to obtain a likelihood value of each pixel displaying the specific crop in the remote sensing images. Second planting blocks of the specific crop in the target remote sensing images are determined accordingly. An accurate and robust identification result is thereby achieved.

Abstract: A cultivated land recognition method in a satellite image includes: segmenting a satellite image of the Earth into a plurality of standard images; and recognizing cultivated land area in each of the standard images using a cultivated land recognition model to obtain a plurality of first images. Edges of ground level entities in each of the standard images are detected using an edge detection model to obtain a plurality of second images. Each of the first images and a corresponding one of the second images is merged to obtain a plurality of third images; and cultivated land images is obtained by segmenting each of the third images using a watershed segmentation algorithm. Not only can a result of recognizing cultivated land in satellite images of the Earth be improved, but an efficiency of recognizing the cultivated land also be improved. A computing device employing the method is also disclosed.

Abstract: A cultivated land recognition method in a satellite image includes: segmenting a satellite image of the Earth into a plurality of standard images; and recognizing cultivated land area in each of the standard images using a cultivated land recognition model to obtain a plurality of first images. Edges of ground level entities in each of the standard images are detected using an edge detection model to obtain a plurality of second images. Each of the first images and a corresponding one of the second images is merged to obtain a plurality of third images; and cultivated land images is obtained by segmenting each of the third images using a watershed segmentation algorithm. Not only can a result of recognizing cultivated land in satellite images of the Earth be improved, but an efficiency of recognizing the cultivated land also be improved. A computing device employing the method is also disclosed.

Abstract: In a crop identification method, multi-temporal sample remote sensing images labeled with first planting blocks of a specific crop are acquired. NDVI data of the sample remote sensing images are calculated. Noise of the NDVI data is reduced. A first multivariate Gaussian model is fitted based on de-noised NDVI data of the sample remote sensing image. Multi-temporal target remote sensing images are acquired. An NDVI time series of each pixel in the target remote sensing image is constructed. The NDVI time series is input to the first multivariate Gaussian model to obtain a likelihood value of each pixel displaying the specific crop in the remote sensing images. Second planting blocks of the specific crop in the target remote sensing images are determined accordingly. An accurate and robust identification result is thereby achieved.

Abstract: A processor includes a decode unit to decode an instruction. The instruction indicates a first 64-bit source operand having a first 64-bit value, indicates a second 64-bit source operand having a second 64-bit value, indicates a third 64-bit source operand having a third 64-bit value, and indicates a fourth 64-bit source operand having a fourth 64-bit value. An execution unit is coupled with the decode unit. The execution unit is operable, in response to the instruction, to store a result. The result includes the first 64-bit value multiplied by the second 64-bit value added to the third 64-bit value added to the fourth 64-bit value. The execution unit may store a 64-bit least significant half of the result in a first 64-bit destination operand indicated by the instruction, and store a 64-bit most significant half of the result in a second 64-bit destination operand indicated by the instruction.

Abstract: Various embodiments are generally directed to techniques for assigning portions of a task among individual cores of one or more processor components of each processing device of a distributed processing system. An apparatus to assign processor component cores to perform task portions includes a processor component; an interface to couple the processor component to a network to receive data that indicates available cores of base and subsystem processor components of processing devices of a distributed processing system, the subsystem processor components made accessible on the network through the base processor components; and a core selection component for execution by the processor component to select cores from among the available cores to execute instances of task portion routines of a task based on a selected balance point between compute time and power consumption needed to execute the instances of the task portion routines. Other embodiments are described and claimed.

Abstract: Various embodiments are generally directed to techniques for assigning portions of a task among individual cores of one or more processor components of each processing device of a distributed processing system. An apparatus to assign processor component cores to perform task portions includes a processor component; an interface to couple the processor component to a network to receive data that indicates available cores of base and subsystem processor components of processing devices of a distributed processing system, the subsystem processor components made accessible on the network through the base processor components; and a core selection component for execution by the processor component to select cores from among the available cores to execute instances of task portion routines of a task based on a selected balance point between compute time and power consumption needed to execute the instances of the task portion routines. Other embodiments are described and claimed.

Abstract: An LED epitaxial structure includes a substrate; a GaN nucleating layer; a superlattice buffer layer comprising a plurality pairs of alternately stacked AlGaN/n-GaN structures; an n-GaN layer; a MQW light-emitting layer, a p-GaN layer and a p-type contact layer. Al(n) represents Al composition value of the nth AlGaN/n-GaN superlattice buffer layer pair; N(n) represents n-type impurity concentration value of the nth AlGaN/n-GaN superlattice buffer layer pair; variation trend of Al(n) is from gradual increase to gradual decrease, and for N(n) is from gradual increase to gradual decrease.

Abstract: A processor includes a decode unit to decode an instruction. The instruction indicates a first 64-bit source operand having a first 64-bit value, indicates a second 64-bit source operand having a second 64-bit value, indicates a third 64-bit source operand having a third 64-bit value, and indicates a fourth 64-bit source operand having a fourth 64-bit value. An execution unit is coupled with the decode unit. The execution unit is operable, in response to the instruction, to store a result. The result includes the first 64-bit value multiplied by the second 64-bit value added to the third 64-bit value added to the fourth 64-bit value. The execution unit may store a 64-bit least significant half of the result in a first 64-bit destination operand indicated by the instruction, and store a 64-bit most significant half of the result in a second 64-bit destination operand indicated by the instruction.

Abstract: An LED epitaxial structure includes a substrate; a GaN nucleating layer; a superlattice buffer layer comprising a plurality pairs of alternately stacked AlGaN/n-GaN structures; an n-GaN layer; a MQW light-emitting layer, a p-GaN layer and a p-type contact layer. Al(n) represents Al composition value of the nth AlGaN/n-GaN superlattice buffer layer pair; N(n) represents n-type impurity concentration value of the nth AlGaN/n-GaN superlattice buffer layer pair; variation trend of Al(n) is from gradual increase to gradual decrease, and for N(n) is from gradual increase to gradual decrease.

Abstract: The present disclosure is directed dynamic compression/decompression (codec) configuration. In general, a device may include a codec configuration module to determine a configuration for use by the codec based on configuration criteria. The configuration criteria may include, for example, data characteristic information, system condition information and user expectation information. The configuration information may be used to select a codec configuration from one or more available codec configurations. For example, a benchmark module also in the device may determine the available codec configurations. After a codec configuration has been selected, it may be set in the codec. It may also be possible for the codec configuration module to monitor for changes in device operation (e.g., changes in the configuration criteria) and to update the codec configuration based on the monitored changes.

Abstract: Various embodiments are generally directed to techniques for assigning portions of a task among individual cores of one or more processor components of each processing device of a distributed processing system. An apparatus to assign processor component cores to perform task portions includes a processor component; an interface to couple the processor component to a network to receive data that indicates available cores of base and subsystem processor components of processing devices of a distributed processing system, the subsystem processor components made accessible on the network through the base processor components; and a core selection component for execution by the processor component to select cores from among the available cores to execute instances of task portion routines of a task based on a selected balance point between compute time and power consumption needed to execute the instances of the task portion routines. Other embodiments are described and claimed.

Abstract: The present disclosure is directed dynamic compression/decompression (codec) configuration. In general, a device may include a codec configuration module to determine a configuration for use by the codec based on configuration criteria. The configuration criteria may include, for example, data characteristic information, system condition information and user expectation information. The configuration information may be used to select a codec configuration from one or more available codec configurations. For example, a benchmark module also in the device may determine the available codec configurations. After a codec configuration has been selected, it may be set in the codec. It may also be possible for the codec configuration module to monitor for changes in device operation (e.g., changes in the configuration criteria) and to update the codec configuration based on the monitored changes.