Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.

Abstract: A design method for an inerter with adaptively adjusted inertia ratio is based on a lead screw-flywheel inerter, which is to change the positions of mass blocks on a flywheel along the radial direction of the flywheel, so as to change of the moment of inertia of the flywheel, and thus to realize adaptive adjustment of the inertia ratio of the inerter. Specifically, the change of angular velocity of the flywheel is caused by the change of an external force load on a lead screw, a centrifugal force on the mass blocks in spring-mass block structures is changed by the angular velocity, and the positions of the mass blocks in the radial direction of the flywheel is determined by the balanced relation of the centrifugal force and a spring restore force, so that the design purpose is achieved.

Abstract: Synthetic brochosomes can be prepared by disposing a monolayer of first polymer microspheres on a substrate and forming a layer of metal on the monolayer of the first polymer microspheres. A monolayer of second polymer microspheres is then disposed on the layer of metal to form a template. The second polymer microspheres are smaller than the first polymer microspheres. A brochosome material is then electrodeposited on the template. The brochosome material is selected from the group consisting of a metal, a metal oxide, a polymer or a hybrid thereof. The first polymer microspheres and the second polymer microspheres are then removed to form a coating of synthetic brochosomes of the brochosome material on the substrate.

Abstract: A high-efficiency yield-increasing exploitation method for natural gas hydrates includes steps of drilling of natural gas hydrate reservoirs along horizontal wells, seepage increasing by fracturing for fracture forming and stability improvement by grouting in the natural gas hydrate reservoirs, and yield improvement by combined exploitation of depressurization of the horizontal wells and heat injection; according to the present invention, drilling time is shortened by rapid drilling along the horizontal wells, the permeability of the reservoirs can be effectively improved by fracturing for fracture forming, the stability of the reservoirs can be improved by injecting foam cement slurry into the reservoirs, and the yield of the natural gas hydrates can be improved by the combined exploitation method of depressurization of the horizontal wells and heat injection.

Abstract: The present disclosure provides a beamforming report transmission method, a communication node and a computer-readable storage medium, the beamforming report transmission method includes: receiving, by a first communication node, a beamforming report sent by a third communication node, where the beamforming report includes at least one of a beamforming result or a channel quality measurement result between the third communication node and at least one second communication node.

Abstract: A high-efficiency yield-increasing exploitation method for natural gas hydrates includes steps of drilling of natural gas hydrate reservoirs along horizontal wells, seepage increasing by fracturing for fracture forming and stability improvement by grouting in the natural gas hydrate reservoirs, and yield improvement by combined exploitation of depressurization of the horizontal wells and heat injection; according to the present invention, drilling time is shortened by rapid drilling along the horizontal wells, the permeability of the reservoirs can be effectively improved by fracturing for fracture forming, the stability of the reservoirs can be improved by injecting by the combined exploitation method of depressurization of the horizontal wells and heat injection.

Abstract: The application proposes a non-destructive testing method for the sealing degree of the small cigarette box packaging, which includes placing the small cigarette box to be tested in an airtight chamber, using a balance cabin to quickly form a stable negative pressure in the airtight chamber; The pressure change of the sealed chamber is continuously measured until equilibrium, and the data model is analyzed and established by using Darcy's law, Fick's diffusion law and the physical process of molecular kinetic theory. Through the non-destructive testing method for the sealing degree of the small cigarette box packaging of the present invention, the traditional destructive measurement (damaged small box packaging) for measuring the sealing degree of cigarette small box is changed into non-destructive testing; The test results have specific physical meaning; The test time of a single sample is reduced to ? of the time of destructive test.

Abstract: There is provided a smoke detector including a first light source, a second light source surface, a light sensor and a processor. The light sensor receives reflected light when the first light source and the second light source emit light, and generates a first detection signal corresponding to light emission of the first light source and a second detection signal corresponding to light emission of the second light source. The processor distinguishes smoke and floating particles according to a similarity between the first detection signal and the second detection signal.

Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.

Abstract: The present disclosure relates to coated steel strip providing the steel with cathodic protection before and after the steel is press hardened or hot formed at a high austenitization temperature up to 950° C. The coating of the coated steel strip comprises zinc, aluminum, and at least one element selected from manganese (Mn) and/or antimony (Sb).

Abstract: All-in-one formulations for preparing repellent coatings on surfaces of substrates include (i) one or more reactive components that can form a bonded layer on a surface in which the bonded layer comprises an array of compound each compound having one end bound to a surface and an opposite end extending away from the surface; (ii) an optional catalyst; (iii) a solvent; and (iv) a lubricant. A repellent coating can be formed from such formulations on substrate surfaces by drying the formulation on the surface to substantially remove the solvent and to form a bonded layer on the surface with the lubricant stably adhered to the bonded layer. The formulations can be applied to surfaces of ceramics, glasses, metals, alloys, composites, polymers or combinations thereof such as ceramic or metal plumbing fixtures, surfaces of glass substrates including mirrors, windshields, windows, surfaces composed of one or more polymers, medical devices such as ostomy appliances, etc.

Abstract: The present disclosure relates to an analog-to-digital conversion circuit comprising: N sampling and conversion modules connected in parallel, configured to simultaneously sample and sequentially convert first analog signals of N channels to output second analog signals, wherein each of the sampling and conversion modules includes a plurality of sampling capacitors connected in parallel, wherein N is an integer greater than 1; a comparator connected to the N sampling and conversion modules, configured to comparing the second analog signals respectively to obtain comparison signals; and a control module connected to the N sampling and conversion modules and the comparator, configured to control the N sampling and conversion modules to output converted digital signals based on the comparison signals.

Abstract: The present application discloses an analog-to-digital converter capable of cancelling sampling noise, which comprises: a sampling circuit configured to acquire an analog input signal; a sampling noise cancelling circuit has an input end connected with an output end of the sampling circuit, and is configured to cancel noise generated by the sampling circuit; a comparator has an input end connected with an output end of the sampling noise cancelling circuit, and an output end connected with an input end of a logic circuit, and is configured to compare magnitudes of output signals of the sampling noise cancelling circuit and output a comparison result to the logic circuit; and the logic circuit has an output end connected with the sampling circuit, and is configured to output a digital output signal, and process the comparison result to obtain a control signal by which an output voltage of the sampling circuit is controlled.

Abstract: The exemplified disclosure presents a successive approximation register analog-to-digital converter circuit that comprises a two-step (e.g., two-stage) analog-to-digital converter (ADC) that operates a 1st-stage successive approximation register (SAR) in the continuous time (CT) domain (also referred to as a “1-st stage CTSAR”) that then feeds a sampling operation location in the second stage. Without a front-end sampling circuit in the 1st-stage, the exemplary successive approximation analog-to-digital converter circuit can avoid high sampling noise associated with such sampling operation and thus can be configured with a substantially smaller input capacitor size (e.g., at least 20 times smaller) as compared to conventional Nyquist ADC with a front-end sample-and-hold circuit.

Abstract: The present application discloses a successive approximation register analog-to-digital converter with passive noise shaping, which comprises: switch capacitor arrays for acquiring analog input signals; a noise shaping circuit which is a passive integral network, the network has input ends connected respectively with output ends of the two switch capacitor arrays and for acquiring output signals of the two switch capacitor arrays, is composed of a plurality of sub passive integrators, and reconfigures the plurality of sub passive integrators to different circuit forms; a comparator which has two input ends connected respectively with output ends of the passive integral network and an output end connected with an input end of a logic circuit, and is configured to compare magnitudes of the output signals of the noise shaping circuit.

Abstract: An exemplary incremental two-step capacitance-to-digital converter (CDC) with a time-domain sigma-delta modulator (TD??M) includes a voltage-controlled oscillator (VCO)-based integrator that can be used in a low-order loop configuration. Example prototypes are disclosed, which when fabricated in 40-nm CMOS technology, provides CDC resolution of 0.29 fF while dissipating only 0.083 nJ per conversion.

Abstract: An exemplary system and method is disclosed employing a floating inverter amplifier comprising an inverter-based circuit comprising an input configured to be switchable between a floating reservoir capacitor during a first phase of operation and to a device power source during a second phase of operation. In some embodiments, the floating inverter amplifier is further configured for current reuse and dynamic bias. In other embodiments, the floating inverter amplifier is further configured with a dynamic cascode mechanism that does not need any additional bias voltage. The dynamic cascode mechanism may be used in combination with 2-step fast-settling operation to provide high-gain and high-speed noise suppression operation.

Abstract: The exemplified disclosure presents a successive approximation register analog-to-digital converter circuit that comprises a two-step (e.g., two-stage) analog-to-digital converter (ADC) that operates a 1st-stage successive approximation register (SAR) in the continuous time (CT) domain (also referred to as a “1-st stage CTSAR”) that then feeds a sampling operation location in the second stage. Without a front-end sampling circuit in the 1st-stage, the exemplary successive approximation analog-to-digital converter circuit can avoid high sampling noise associated with such sampling operation and thus can be configured with a substantially smaller input capacitor size (e.g., at least 20 times smaller) as compared to conventional Nyquist ADC with a front-end sample-and-hold circuit.