Patents by Inventor Nan-Ting Yeh
Nan-Ting Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9183329Abstract: A virtual platform simulates behavior of a modular circuit based on a circuit design including both high-level and low-level models of circuit modules. A compiler that converts the high-level and low-level models into executable models prior to an initial simulation also generates a separate “replay engine” corresponding to each low-level module for use during subsequent replay simulations. During the initial simulation, the virtual platform simulates circuit behavior by concurrently executing the high-level and low-level executable models and recording data representing behavior of output signals of the low-level design modules modeled by the executable models. To speed up subsequent replays of the simulation, the virtual platform executes one or more of the replay engines in lieu of executing their corresponding low-level executable models.Type: GrantFiled: March 19, 2009Date of Patent: November 10, 2015Assignee: Synopsys, Inc.Inventors: Nan-Ting Yeh, Wenchu Cheng, Kuen-Yang Tsai, Chia-Ling Ho
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Patent number: 7895027Abstract: A computer-based simulation process executes a checkpoint operation while simulating behavior of an electronic circuit by forking an active checkpoint process having the same state as the original simulation process. While simulation time for the simulation process continues to increase after executing the checkpoint operation, simulation time for the checkpoint process remains unchanged so that the checkpoint process remains in the state of the simulation at the simulation time it executed the checkpoint operation (the “checkpoint time”). When the checkpoint process subsequently receives a request to resume simulating the circuit, it forks a new simulation process that mimics the original simulation process as of checkpoint time, and the new simulation process then begins to advance its simulation time, thereby enabling it to re-simulate behavior of the electronic circuit previously simulated by the original simulation process starting from the checkpoint time.Type: GrantFiled: January 17, 2008Date of Patent: February 22, 2011Assignee: Springsoft, Inc.Inventors: Kuo-Ching Lin, Nan-Ting Yeh, Kuen-Yang Tsai
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Publication number: 20100241414Abstract: A virtual platform simulates behavior of a modular circuit based on a circuit design including both high-level and low-level models of circuit modules. A compiler that converts the high-level and low-level models into executable models prior to an initial simulation also generates a separate “replay engine” corresponding to each low-level module for use during subsequent replay simulations. During the initial simulation, the virtual platform simulates circuit behavior by concurrently executing the high-level and low-level executable models and recording data representing behavior of output signals of the low-level design modules modeled by the executable models. To speed up subsequent replays of the simulation, the virtual platform executes one or more of the replay engines in lieu of executing their corresponding low-level executable models.Type: ApplicationFiled: March 19, 2009Publication date: September 23, 2010Applicant: SPRINGSOFT USA, INC.Inventors: Nan-Ting YEH, Wenchu CHENG, Kuen-Yang TSAI, Chia-Ling HO
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Publication number: 20090187394Abstract: A computer-based simulation process executes a checkpoint operation while simulating behavior of an electronic circuit by forking an active checkpoint process having the same state as the original simulation process. While simulation time for the simulation process continues to increase after executing the checkpoint operation, simulation time for the checkpoint process remains unchanged so that the checkpoint process remains in the state of the simulation at the simulation time it executed the checkpoint operation (the “checkpoint time”). When the checkpoint process subsequently receives a request to resume simulating the circuit, it forks a new simulation process that mimics the original simulation process as of checkpoint time, and the new simulation process then begins to advance its simulation time, thereby enabling it to re-simulate behavior of the electronic circuit previously simulated by the original simulation process starting from the checkpoint time.Type: ApplicationFiled: January 17, 2008Publication date: July 23, 2009Applicant: SPRINGSOFT, INC.Inventors: Kuo-Ching Lin, Nan-Ting Yeh, Kuen-Yang Tsai
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Patent number: 7283944Abstract: While simulating a circuit described by the netlist, a circuit simulator produces a dump file containing a set of waveform data sequences, each corresponding to a separate signal within the circuit, and representing states of its corresponding signal at a succession of times during the circuit simulation. Based on a mapping of the waveform data sequences to lines of a bus, and on transaction data models describing characteristic signal patterns appearing on the bus during each type of transaction that can occur on the bus, a transaction analysis system identifies transactions that occurred on the bus during the simulation. The transaction analysis system also notes a time during the circuit simulation in which each transaction occurred, and generates a display including a separate representation of each identified transaction positioned to represent the time the transaction occurred.Type: GrantFiled: December 15, 2003Date of Patent: October 16, 2007Assignee: Springsoft, Inc.Inventors: Jien-Shen Tsai, Nan-Ting Yeh, Mou-Tien Lu, Chung-Chia Chen, Shih-Fang Hsiao, Gwo-Ching Lin, Sheng-Chiang Chen
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Publication number: 20050131666Abstract: While simulating a circuit described by the netlist, a circuit simulator produces a dump file containing a set of waveform data sequences, each corresponding to a separate signal within the circuit, and representing states of its corresponding signal at a succession of times during the circuit simulation. Based on a mapping of the waveform data sequences to lines of a bus, and on transaction data models describing characteristic signal patterns appearing on the bus during each type of transaction that can occur on the bus, a transaction analysis system identifies transactions that occurred on the bus during the simulation. The transaction analysis system also notes a time during the circuit simulation in which each transaction occurred, and generates a display including a separate representation of each identified transaction positioned to represent the time the transaction occurred.Type: ApplicationFiled: December 15, 2003Publication date: June 16, 2005Inventors: Jien-Shen Tsai, Nan-Ting Yeh, Mou-Tien Lu, Chung-Chia Chen, Shih-Fang Hsiao, Gwo-Ching Lin, Sheng-Chiang Chen
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Publication number: 20020051018Abstract: The invention provides an apparatus and method to scroll browsing display of web pages in a browser by dragging web pages with an input device. The apparatus for browser interface operation comprises: a web page scroll event detector and a web page link event detector. When the dragging distance is longer than a predetermined length, the apparatus sends a web page scroll request to the browser for scrolling the web page. When the browser receives the web page scroll request and it analyzes a vertical and horizontal component distance of the dragging distance. The browser then scrolls the horizontal scroll bar based on the horizontal component distance and the vertical scroll bar based on the vertical component distance. When the dragging distance is not longer than a predetermined length, the apparatus sends a web page link request to the browser for executing embedded web page link.Type: ApplicationFiled: May 24, 2001Publication date: May 2, 2002Inventor: Nan-Ting Yeh