Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer adjacent to the gate structure, wherein the first spacer comprises silicon carbon nitride (SiCN); forming a second spacer adjacent to the first spacer, wherein the second spacer comprises silicon oxycarbonitride (SiOCN); and forming a source/drain region adjacent to two sides of the second spacer.

Abstract: A package structure and method of forming the same are provided. The package structure includes a first die and a second die disposed side by side, a first encapsulant laterally encapsulating the first and second dies, a bridge die disposed over and connected to the first and second dies, and a second encapsulant. The bridge die includes a semiconductor substrate, a conductive via and an encapsulant layer. The semiconductor substrate has a through substrate via embedded therein. The conductive via is disposed over a back side of the semiconductor substrate and electrically connected to the through substrate via. The encapsulant layer is disposed over the back side of the semiconductor substrate and laterally encapsulates the conductive via. The second encapsulant is disposed over the first encapsulant and laterally encapsulates the bridge die.

Abstract: A package structure and method of forming the same are provided. The package structure includes a first die and a second die disposed side by side, a first encapsulant laterally encapsulating the first and second dies, a bridge die disposed over and connected to the first and second dies, and a second encapsulant. The bridge die includes a semiconductor substrate, a conductive via and an encapsulant layer. The semiconductor substrate has a through substrate via embedded therein. The conductive via is disposed over a back side of the semiconductor substrate and electrically connected to the through substrate via. The encapsulant layer is disposed over the back side of the semiconductor substrate and laterally encapsulates the conductive via. The second encapsulant is disposed over the first encapsulant and laterally encapsulates the bridge die.

Abstract: A method of manufacturing a semiconductor device includes the following steps. A semiconductor substrate is provided. A plurality of dielectric layers and a plurality of first conductive features in the dielectric layers are formed on the semiconductor substrate. At least one polymer layer and a plurality of second conductive features in the at least one polymer layer on the dielectric layers are formed. A plurality of conductive connectors are formed to electrically connect to the second conductive features. The semiconductor substrate, the dielectric layers and the at least one polymer layer are cut into a plurality of dies.

Abstract: A system on chip (SoC) die package is attached to a redistribution structure of a semiconductor device package such that a top surface of the SoC die package is above a top surface of an adjacent memory die package. This may be achieved through the use of various attachment structures that increase the height of the SoC die package. After encapsulating the memory die package and the SoC die package in an encapsulation layer, the encapsulation layer is grinded down. The top surface of the SoC die package being above the top surface of the adjacent memory die package results in the top surface of the SoC die package being exposed through the encapsulation layer after the grinding operation. This enables heat to be dissipated through the top surface of the SoC die package.

Abstract: A semiconductor device includes a bridge and a first integrated circuit. The bridge is free of active devices and includes a first conductive connector. The first integrated circuit includes a substrate and a second conductive connector disposed in a first dielectric layer over the substrate. The second conductive connector is directly bonded to the first conductive connector. The second conductive connector includes conductive pads and first conductive vias and a second conductive via between the conductive pads. The second conductive via is not overlapped with the first conductive vias while the first conductive vias are overlapped with one another. A vertical distance between the second conductive via and the first conductive connector is larger than a vertical distance between each of the first conductive vias and the first conductive connector, and a sidewall of the first dielectric layer is substantially flush with a sidewall of the substrate.

Abstract: The present disclosure relates to a grouting material for reinforcement of coal-rock mass in low-temperature mining. The material includes a component A and a component B, where the component A includes 100 parts of a polyether polyol A and 0.05 parts to 0.1 parts of a catalyst; the component B includes 18 parts to 24 parts of a polyether polyol B, 21 parts to 26 parts of a flame retardant, 50 parts to 61 parts of polyisocyanate, and 0.05 parts of the catalyst. A preparation method of the grouting material includes the following steps: stirring the polyether polyol A and the catalyst to obtain the component A; drying the polyether polyol B and mixing with the polyisocyanate and the catalyst, and conducting a reaction to obtain an isocyanate prepolymer; adding the flame retardant to the isocyanate prepolymer, and adjusting a viscosity to obtain the component B.

Abstract: A package structure and method of forming the same are provided. The package structure includes a first die and a second die disposed side by side, a first encapsulant laterally encapsulating the first and second dies, a bridge die disposed over and connected to the first and second dies, and a second encapsulant. The bridge die includes a semiconductor substrate, a conductive via and an encapsulant layer. The semiconductor substrate has a through substrate via embedded therein. The conductive via is disposed over a back side of the semiconductor substrate and electrically connected to the through substrate via. The encapsulant layer is disposed over the back side of the semiconductor substrate and laterally encapsulates the conductive via. The second encapsulant is disposed over the first encapsulant and laterally encapsulates the bridge die.

Abstract: A semiconductor device includes a bridge and a first integrated circuit. The bridge is free of active devices and includes a first conductive connector. The first integrated circuit includes a substrate and a second conductive connector disposed in a first dielectric layer over the substrate. The second conductive connector is directly bonded to the first conductive connector. The second conductive connector includes conductive pads and first conductive vias and a second conductive via between the conductive pads. The second conductive via is not overlapped with the first conductive vias while the first conductive vias are overlapped with one another. A vertical distance between the second conductive via and the first conductive connector is larger than a vertical distance between each of the first conductive vias and the first conductive connector, and a sidewall of the first dielectric layer is substantially flush with a sidewall of the substrate.

Abstract: A package structure and method of forming the same are provided. The package structure includes a first die and a second die disposed side by side, a first encapsulant laterally encapsulating the first and second dies, a bridge die disposed over and connected to the first and second dies, a second encapsulant and a first RDL structure. The bridge die includes a semiconductor substrate, a conductive via and an encapsulant layer. The semiconductor substrate has a through substrate via embedded therein. The conductive via is disposed over a back side of the semiconductor substrate and electrically connected to the through substrate via. The encapsulant layer is disposed over the back side of the semiconductor substrate and laterally encapsulates the conductive via. The second encapsulant is disposed over the first encapsulant and laterally encapsulates the bridge die. The first RDL structure is disposed on the bridge die and the second encapsulant.

Abstract: A semiconductor device includes a bridge and a plurality of dies. The bridge is free of active devices and includes a substrate, an interconnect structure, a redistribution layer structure and a plurality of conductive connectors. The interconnect structure includes at least one dielectric layer and a plurality of first conductive features in the at least one dielectric layer. The redistribution layer structure includes at least one polymer layer and a plurality of second conductive features in the at least one polymer layer, wherein a sidewall of the interconnect structure is substantially flush with a sidewall of the redistribution layer structure. The conductive connectors are electrically connected to one another by the redistribution layer structure and the interconnect structure. The bridge electrically connects the plurality of dies.

Abstract: A package structure and method of forming the same are provided. The package structure includes a first die and a second die disposed side by side, a first encapsulant laterally encapsulating the first and second dies, a bridge die disposed over and connected to the first and second dies, a second encapsulant and a first RDL structure. The bridge die includes a semiconductor substrate, a conductive via and an encapsulant layer. The semiconductor substrate has a through substrate via embedded therein. The conductive via is disposed over a back side of the semiconductor substrate and electrically connected to the through substrate via. The encapsulant layer is disposed over the back side of the semiconductor substrate and laterally encapsulates the conductive via. The second encapsulant is disposed over the first encapsulant and laterally encapsulates the bridge die. The first RDL structure is disposed on the bridge die and the second encapsulant.

Abstract: A semiconductor device includes a bridge and a plurality of dies. The bridge is free of active devices and includes a substrate, an interconnect structure, a redistribution layer structure and a plurality of conductive connectors. The interconnect structure includes at least one dielectric layer and a plurality of first conductive features in the at least one dielectric layer. The redistribution layer structure includes at least one polymer layer and a plurality of second conductive features in the at least one polymer layer, wherein a sidewall of the interconnect structure is substantially flush with a sidewall of the redistribution layer structure. The conductive connectors are electrically connected to one another by the redistribution layer structure and the interconnect structure. The bridge electrically connects the plurality of dies.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer adjacent to the gate structure, wherein the first spacer comprises silicon carbon nitride (SiCN); forming a second spacer adjacent to the first spacer, wherein the second spacer comprises silicon oxycarbonitride (SiOCN); and forming a source/drain region adjacent to two sides of the second spacer.

Abstract: In an embodiment, a device includes: a first reflective structure including first doped layers of a semiconductive material, alternating ones of the first doped layers being doped with a p-type dopant; a second reflective structure including second doped layers of the semiconductive material, alternating ones of the second doped layers being doped with a n-type dopant; an emitting semiconductor region disposed between the first reflective structure and the second reflective structure; a contact pad on the second reflective structure, a work function of the contact pad being less than a work function of the second reflective structure; a bonding layer on the contact pad, a work function of the bonding layer being greater than the work function of the second reflective structure; and a conductive connector on the bonding layer.

Abstract: Methods for realizing the CAPTCHA with 3D models and device thereof comprises following steps: (1) randomly selecting a 3D model from a model repository as an original model; generating two sets of random transformations; (2) applying the target transformations to the original model to generate a target model; generating a target image from rendering the target model; (3) applying the initial transformations to the original model to generate an operating model; displaying the operating model and the target image in two regions in client; (4) changing the property of the operating model through user interactive operation until the state of the operating model is consistent with the target image; generating a final transformations from the initial transformations by means of user interactive operation; (5) comparing the target transformations with the final transformations. It leverages the advantage of perception of 3D space in human beings.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer adjacent to the gate structure, wherein the first spacer comprises silicon carbon nitride (SiCN); forming a second spacer adjacent to the first spacer, wherein the second spacer comprises silicon oxycarbonitride (SiOCN); and forming a source/drain region adjacent to two sides of the second spacer.

Abstract: In an embodiment, a device includes: a first reflective structure including first doped layers of a semiconductive material, alternating ones of the first doped layers being doped with a p-type dopant; a second reflective structure including second doped layers of the semiconductive material, alternating ones of the second doped layers being doped with a n-type dopant; an emitting semiconductor region disposed between the first reflective structure and the second reflective structure; a contact pad on the second reflective structure, a work function of the contact pad being less than a work function of the second reflective structure; a bonding layer on the contact pad, a work function of the bonding layer being greater than the work function of the second reflective structure; and a conductive connector on the bonding layer.

Abstract: A method of preventing charge loss from a floating gate includes providing a substrate comprising a memory cell region and a logic region, wherein a floating gate is disposed in the memory cell region and a gate structure is disposed within the logic region, a first hard mask covers the floating gate and a second hard mask covers the first hard mask. A planarization process is performed to remove entirely the second hard mask and expose the first hard mask. Later, a third hard mask is formed to cover the first hard mask, the gate structure and the substrate, wherein the third hard mask prevents charges in the floating gate from flowing to the first hard mask. Finally, the third hard mask within the logic region is removed and the third hard mask remains within the memory region.

Abstract: In an embodiment, a device includes: a first reflective structure including first doped layers of a semiconductive material, alternating ones of the first doped layers being doped with a p-type dopant; a second reflective structure including second doped layers of the semiconductive material, alternating ones of the second doped layers being doped with a n-type dopant; an emitting semiconductor region disposed between the first reflective structure and the second reflective structure; a contact pad on the second reflective structure, a work function of the contact pad being less than a work function of the second reflective structure; a bonding layer on the contact pad, a work function of the bonding layer being greater than the work function of the second reflective structure; and a conductive connector on the bonding layer.