Abstract: A display panel includes multiple scanning lines, sub-pixels and a scanning drive circuit. The sub-pixels include first sub-pixels, second sub-pixels and third sub-pixels. Each scanning line connects to sub-pixels of one same type of emission. The first sub-pixels include a first group and a second group, and the third sub-pixels include a first group and a second group. The scanning drive circuit is used for driving a fraction of the sub-pixels in one frame. In odd frames, only first group of the first sub-pixels, and the third sub-pixels, and the second sub-pixels are driven to emit light in odd frames. In even frames, only second group of the first sub-pixels and the third sub-pixels, and the second sub-pixels are driven to emit light. When the display screen is refreshed, the number of the sub-pixels driven to emit light is reduced, and power of charging and discharging of the sub-pixels is reduced.

Abstract: Disclosed are an array substrate, a display panel, a display device and a manufacturing method of an array substrate. The array substrate includes: a driving array layer, a first insulating layer, an auxiliary trace layer, a second insulating layer and a first electrode layer, which are disposed in sequence. The driving array layer includes multiple thin film transistors. The first insulating layer includes first via holes, and the first electrode layer includes multiple first electrodes. The auxiliary trace layer includes multiple auxiliary traces which correspond to the multiple first electrodes one by one. An auxiliary trace is electrically connected to an electrode of a corresponding thin film transistor through a first via hole. The second insulating layer includes second via holes, and an auxiliary trace is electrically connected to a respective first electrode through a second via hole.

Abstract: A display panel and a method for driving the same, and a display device are provided. The display panel includes a light emitting element and a pixel circuit that includes a data writing module configured to provide a data signal and an adjusting voltage, a driving module configured to provide a driving current to the light emitting element and including a driving transistor, and a compensation module configured to compensate a threshold voltage of the driving transistor. An operation process of the display panel includes a period of a data writing frame during which the pixel circuit executes a data writing phase during which the data writing module writes the data signal and a light emitting phase, and a period of a holding frame during which the pixel circuit executes a reset and adjustment phase during which the data writing module writes the adjusting voltage and the light emitting phase.

Abstract: A liquid crystal display (LCD) panel and an emission D-IC on array (EOA) module (10?) thereof are provided. The EOA module includes a high-level generating unit, a resetting unit, and a restoring unit. The high-level generating unit is configured to generate an output signal, where the output signal is at high level when a first clock signal (CLK) is at high level. The resetting unit is configured to reset the output signal from high level to low level when a second clock signal (CLKB) and a scan signal (Gn) of a current stage are simultaneously at high level. The restoring unit is configured to restore the output signal from low level to high level when a scan signal (Gn+1) of a subsequent stage is at high level.

Abstract: A liquid crystal display (LCD) panel and an emission D-IC on array (EOA) module (10?) thereof are provided. The EOA module includes a high-level generating unit, a resetting unit, and a restoring unit. The high-level generating unit is configured to generate an output signal, where the output signal is at high level when a first clock signal (CLK) is at high level. The resetting unit is configured to reset the output signal from high level to low level when a second clock signal (CLKB) and a scan signal (Gn) of a current stage are simultaneously at high level. The restoring unit is configured to restore the output signal from low level to high level when a scan signal (Gn+1) of a subsequent stage is at high level.

Abstract: Disclosed are a display panel and a driving method. The display panel includes: a substrate, sub-pixels and a switch module. Each sub-pixel includes a pixel drive circuit and a light-emitting element. The pixel drive circuit includes an initialization transistor and a drive transistor, each including a first electrode, a second electrode, and a gate electrode; the first electrode of the initialization transistor is electrically connected to the gate electrode of the drive transistor. The drive transistor provides a drive current to the light-emitting element, the second electrodes of the initialization transistors of at least two sub-pixels are connected to an output terminal of the same switch module. An input terminal of the switch module is electrically connected to an initialization signal terminal. The switch module transfers an initialization signal to the second electrode of the initialization transistor.

Abstract: A display panel includes multiple scanning lines, sub-pixels and a scanning drive circuit. The sub-pixels include first sub-pixels, second sub-pixels and third sub-pixels. Each scanning line connects to sub-pixels of one same type of emission. The first sub-pixels include a first group and a second group, and the third sub-pixels include a first group and a second group. The scanning drive circuit is used for driving a fraction of the sub-pixels in one frame. In odd frames, only first group of the first sub-pixels, and the third sub-pixels, and the second sub-pixels are driven to emit light in odd frames. In even frames, only second group of the first sub-pixels and the third sub-pixels, and the second sub-pixels are driven to emit light. When the display screen is refreshed, the number of the sub-pixels driven to emit light is reduced, and power of charging and discharging of the sub-pixels is reduced.

Abstract: Disclosed are an array substrate, a display panel, a display device and a manufacturing method of an array substrate. The array substrate includes: a driving array layer, a first insulating layer, an auxiliary trace layer, a second insulating layer and a first electrode layer, which are disposed in sequence. The driving array layer includes multiple thin film transistors. The first insulating layer includes first via holes, and the first electrode layer includes multiple first electrodes. The auxiliary trace layer includes multiple auxiliary traces which correspond to the multiple first electrodes one by one. An auxiliary trace is electrically connected to an electrode of a corresponding thin film transistor through a first via hole. The second insulating layer includes second via holes, and an auxiliary trace is electrically connected to a respective first electrode through a second via hole.

Abstract: The present invention relates to an organic light emitting diode display capable of suppressing voltage distribution inhomogeneity on a display panel so as to realize a brightness homogeneity of a display screen. The organic light emitting diode display comprises a substrate, an active region disposed on the substrate, and an annular wiring similarly formed on the substrate and surrounding the periphery of the active region to form a closed pattern, the supply voltage supplied to the active region is applied to the annular wiring.

Abstract: The present disclosure provides a display device, including: a gate line and a data line; a pixel array; a gate driver, configured to provide a gate signal to the gate line; a test circuit, coupled to a first input line and a second input line respectively; and a data driver, including a first power line, a first transistor and a third input line, wherein the first power line is configured to supply an initial voltage to the pixel array, the first power line is coupled to the first input line via the first transistor, a gate of the first transistor is coupled to the third input line, the third input line is configured to transmit a pre-charge control signal, and the pixel array is configured to supply the initial voltage to each pixel in the pixel array based on the pre-charge control signal.

Abstract: A method and an apparatus for calculating the SOC of a battery being charged and a battery pack including the apparatus are disclosed in the present disclosure. The method for calculating the SOC includes: obtaining a full charge voltage and a reference charging voltage curve of the battery; taking a voltage value from the approximately linear ascent stage of the reference charging voltage curve as a preset reference voltage, and obtaining a corresponding reference SOC; acquiring a current charging voltage at which a charging voltage curve corresponding to a current charging state of the battery enters into an approximately linear ascent stage; determining a compensation factor according to the preset reference voltage, the full charge voltage, and the current charging voltage; and utilizing the compensation factor and the reference SOC to calculate a current SOC corresponding to the current charging state of the battery.

Abstract: The present invention relates to the field of display apparatus, more specifically, to a compensation circuit, an AMOLED structure and a display device. Said circuit comprises a plurality of pixel units, each for the plurality of pixel units includes at least one light emitter, and each of said pixel units comprises: an anode initialization signal interface, a CST initialization port, a data control port and an enable signal control port. Compared with the prior art, the advantages of the present invention are: according to the invention, there is no need to individually set up an anode initialization signal line, the umber of the signal lines are reduced from 4 to 3, which is benefit for achieving the design of the product HPPI. And the signal control lines reduce the space occupied by jumper wire during the connection process, which is benefit to the design of narrow border products.

Abstract: The present invention relates to an organic light emitting diode display capable of suppressing voltage distribution inhomogeneity on a display panel so as to realize a brightness homogeneity of a display screen. The organic light emitting diode display comprises a substrate, an active region disposed on the substrate, and an annular wiring similarly formed on the substrate and surrounding the periphery of the active region to form a closed pattern, the supply voltage supplied to the active region is applied to the annular wiring.

Abstract: A method and an apparatus for calculating the SOC of a battery being charged and a battery pack including the apparatus are disclosed in the present disclosure. The method for calculating the SOC includes: obtaining a full charge voltage and a reference charging voltage curve of the battery; taking a voltage value from the approximately linear ascent stage of the reference charging voltage curve as a preset reference voltage, and obtaining a corresponding reference SOC; acquiring a current charging voltage at which a charging voltage curve corresponding to a current charging state of the battery enters into an approximately linear ascent stage; determining a compensation factor according to the preset reference voltage, the full charge voltage, and the current charging voltage; and utilizing the compensation factor and the reference SOC to calculate a current SOC corresponding to the current charging state of the battery.

Abstract: The present disclosure provides a display device, including: a gate line and a data line; a pixel array; a gate driver, configured to provide a gate signal to the gate line; a test circuit, coupled to a first input line and a second input line respectively; and a data driver, including a first power line, a first transistor and a third input line, wherein the first power line is configured to supply an initial voltage to the pixel array, the first power line is coupled to the first input line via the first transistor, a gate of the first transistor is coupled to the third input line, the third input line is configured to transmit a pre-charge control signal, and the pixel array is configured to supply the initial voltage to each pixel in the pixel array based on the pre-charge control signal.

Abstract: A pixel structure includes a plurality of pixel cells each including two sub-pixel cells. Each of the two sub-pixel cell includes: a first sub-pixel; and at least two second sub-pixels parallelly adjacent to each other. Herein, organic material parts of the at least two second sub-pixels are interconnected and the first sub-pixel is arranged staggered with any of the at least two second sub-pixels in both a first direction and a second direction, and the first direction is perpendicular to the second direction.

Abstract: The present invention relates to the field of display apparatus, more specifically, to a compensation circuit, an AMOLED structure and a display device. Said circuit comprises a plurality of pixel units, each for the plurality of pixel units includes at least one light emitter, and each of said pixel units comprises: an anode initialization signal interface, a CST initialization port, a data control port and an enable signal control port. Compared with the prior art, the advantages of the present invention are: according to the invention, there is no need to individually set up an anode initialization signal line, the umber of the signal lines are reduced from 4 to 3, which is benefit for achieving the design of the product HPPI. And the signal control lines reduce the space occupied by jumper wire during the connection process, which is benefit to the design of narrow border products.

Abstract: A pixel structure includes a plurality of pixel cells each including two sub-pixel cells. Each of the two sub-pixel cell includes: a first sub-pixel; and at least two second sub-pixels parallelly adjacent to each other. Herein, organic material parts of the at least two second sub-pixels are interconnected and the first sub-pixel is arranged staggered with any of the at least two second sub-pixels in both a first direction and a second direction, and the first direction is perpendicular to the second direction.