Abstract: Embodiments relate to a system, program product, and method for employing deep learning techniques to fuse data across modalities. A multi-modal data set is received, including a first data set having a first modality and a second data set having a second modality, with the second modality being different from the first modality. The first and second data sets are processed, including encoding the first data set into one or more first vectors, and encoding the second data set into one or more second vectors. The processed multi-modal data set is analyzed, and the encoded features from the first and second modalities are iteratively and asynchronously fused. The fused modalities include combined vectors from the first and second data sets representing correlated temporal behavior. The fused vectors are then returned as output data.

Abstract: Dynamically adjusting, using artificial intelligence (AI), sensors and models of an autonomous roaming robotic device, which includes receiving data regarding an asset at a computer of a roaming robotic device from sensors on the robotic device. The robotic device identifies an asset at a location using the sensors, and the robotic device has instructions, received from a control system, to inspect the location or items at the location. The data is analyzed using the computer of the robotic device, and the analysis includes using historical data for the asset. An AI model is loaded using the computer of the robotic device, based on the identification of the asset. A sensor is selected using the computer of the robotic device, for conducting an inspection of the asset based on the analysis of the data and the AI model.

Abstract: A method, computer system, and a computer program product for augmented reality guidance are provided. Device orientation instructions may be displayed as augmented reality on a display screen of a device. The device may include a camera and may be portable. The display screen may show a view of an object. At least one additional instruction may be received that includes at least one word directing user interaction with the object. The at least one additional instruction may be displayed on the display screen of the device. The camera may capture an image of the object regarding the at least one additional instruction. The image may be input to a first machine learning model so that an output of the first machine learning model is generated. The output may be received from the first machine learning model. The output may be displayed on the display screen.

Abstract: A method, computer system, and a computer program product for augmented reality guidance are provided. Device orientation instructions may be displayed as augmented reality on a display screen of a device. The device may include a camera and may be portable. The display screen may show a view of an object. At least one additional instruction may be received that includes at least one word directing user interaction with the object. The at least one additional instruction may be displayed on the display screen of the device. The camera may capture an image of the object regarding the at least one additional instruction. The image may be input to a first machine learning model so that an output of the first machine learning model is generated. The output may be received from the first machine learning model. The output may be displayed on the display screen.

Abstract: Embodiments relate to a system, program product, and method for employing deep learning techniques to fused data across modalities. A multi-modal data set is received, including a first data set having a first modality and a second data set having a second modality, with the second modality being different from the first modality. The first and second data sets are processed, including encoding the first data set into one or more first vectors, and encoding the second data set into one or more second vectors. The processed multi-modal data set is analyzed, and the encoded features from the first and second modalities are iteratively and asynchronously fused. The fused modalities include combined vectors from the first and second data sets representing correlated temporal behavior. The fused vectors are then returned as output data.

Abstract: An audio forecasting algorithm that is adjusted (or trained), by machine learning, prior to a sports contest that will be broadcast. The audio forecasting algorithm is then used to position a set of mobile microphones on an ongoing basis during the sports contest. In some embodiments, a band forecasting algorithm is used in the audio forecasting algorithm. In some embodiments, a swarm based correlation algorithm is used in the audio forecasting algorithm.

Abstract: An audio forecasting algorithm that is adjusted (or trained), by machine learning, prior to a sports contest that will be broadcast. The audio forecasting algorithm is then used to position a set of mobile microphones on an ongoing basis during the sports contest. In some embodiments, a band forecasting algorithm is used in the audio forecasting algorithm. In some embodiments, a swarm based correlation algorithm is used in the audio forecasting algorithm.

Abstract: Methods and structures and methods of designing structures for charge dissipation in an integrated circuit on an SOI substrate. A first structure includes a charge dissipation ring around a periphery of the integrated circuit chip and one or more charge dissipation pedestals physically and electrically connected to the charge dissipation pedestals. The silicon layer and bulk silicon layer of the SOI substrate are connected by the guard ring and the charge dissipation pedestals. The ground distribution grid of the integrated circuit chip is connected to an uppermost wire segment of one or more charge dissipation pedestals. A second structure, replaces the charge dissipation guard ring with additional charge dissipation pedestal elements.

Abstract: Methods and structures and methods of designing structures for charge dissipation in an integrated circuit on an SOI substrate. A first structure includes a charge dissipation ring around a periphery of the integrated circuit chip and one or more charge dissipation pedestals physically and electrically connected to the charge dissipation pedestals. The silicon layer and bulk silicon layer of the SOI substrate are connected by the guard ring and the charge dissipation pedestals. The ground distribution grid of the integrated circuit chip is connected to an uppermost wire segment of one or more charge dissipation pedestals. A second structure, replaces the charge dissipation guard ring with additional charge dissipation pedestal elements.

Abstract: Methods and structures and methods of designing structures for charge dissipation in an integrated circuit on an SOI substrate. A first structure includes a charge dissipation ring around a periphery of the integrated circuit chip and one or more charge dissipation pedestals physically and electrically connected to the charge dissipation pedestals. The silicon layer and bulk silicon layer of the SOI substrate are connected by the guard ring and the charge dissipation pedestals. The ground distribution grid of the integrated circuit chip is connected to an uppermost wire segment of one or more charge dissipation pedestals. A second structure, replaces the charge dissipation guard ring with additional charge dissipation pedestal elements.

Abstract: Custom connections between pairs of copper wires in a last damascene wiring level are effected by creating openings in an overlying insulating layer which span a distance between portions of the two wires, then filling the openings with aluminum. The openings can be created (or completed) by a second, maskless UV laser exposure of positive photoresist which is used for patterning the insulating layer. If an opening is not created, an aluminum connecting shape overlying the insulating layer will not effect a connection between the two wires. Similar results can be achieved by laser exposure of a resist used to pattern the aluminum layer, thereby causing breaks in connecting shape when it is desired not to have a connection.

Abstract: An interconnection wiring system incorporating two levels of interconnection wiring separated by a first dielectric, a capacitor formed by a second dielectric, a bottom electrode of the lower interconnection wiring or a via and a top electrode of the upper interconnection wiring or a separate metal layer. The invention overcomes the problem of leakage current and of substrate stray capacitance by positioning the capacitor between two levels of interconnection wiring.

Abstract: An interconnection wiring system incorporating two levels of interconnection wiring separated by a first dielectric, a capacitor formed by a second dielectric, a bottom electrode of the lower interconnection wiring or a via and a top electrode of the upper interconnection wiring or a separate metal layer. The invention overcomes the problem of leakage current and of substrate stray capacitance by positioning the capacitor between two levels of interconnection wiring.

Abstract: An aid to the manipulation of microfabricated micro tools in manufacturing and assembly is disclosed. A sequence of micro tools and a manipulator are connected to one another via attachment links as a combination. The attachment links are optimized to readily allow severing of individual micro tools from the combination as needed. The manipulator provides an aid for handling the combination via probe, pliers, clasping, mating or other device. This facilitates human or machine interaction with the combination of micro tools, either for subsequent processing, or for the assembly of the micro tools into a completed product.

Abstract: A method of forming a semiconductor structure having features of differing sizes, includes forming a first layer on a semiconductor substrate; patterning only a first plurality of features of a first feature size on the first layer; removing portions of the first layer, the portions corresponding to the first plurality of features, filling the first plurality of openings; forming a second layer, the second layer overlying the first layer and the filled openings; patterning a second plurality of features of a second feature size on the second layer; removing portions of the first layer and second layer, the portions corresponding to the second plurality of features, the second plurality of openings extending through the first and second layers, and filling the second plurality openings.

Abstract: A seamless micromechanical object is cast by forming a multilevel mold, filling the mold, and selectively removing the mold with respect to the micromechanical object. The mold can have a first level having a first opening therein, and a second level on the first level, the second level having a second opening therein, the second opening smaller than the first opening. The object may contain a controlled void, for example a micromechanical auger with a void formed therethrough to be used as a capillary to drain off fluids when the auger is in use.

Abstract: According to the present invention, an improved method for planarizing the surface of a dielectric or metal layer in an integrated circuit manufacturing process is disclosed. The dielectric or metal layer to be planarized is selectively patterned and etched over different regions of the surface. The size, shape, density, and depth of the patterns are determined by the pattern factor of the integrated circuit structures underlying the layer to be planarized. Further, by using the pattern factor of the underlying structures to determine the density, size, depth and placement of the surface pattern, the overall planarization process can be improved. Other empirically determined factors, such as material strength, CMP slurry temperature, and pad pressure can also be used to further refine the CMP process. By varying the pattern over the entire surface of the layer to be planarized, the CMP material removal rate can be controlled to achieve a more planar surface.

Abstract: An interconnection wiring system incorporating two levels of interconnection wiring separated by a first dielectric, a capacitor formed by a second dielectric, a bottom electrode of the lower interconnection wiring or a via and a top electrode of the upper interconnection wiring or a separate metal layer. The invention overcomes the problem of leakage current and of substrate stray capacitance by positioning the capacitor between two levels of interconnection wiring.