Abstract: A method includes monitoring a bit in a coprocessor included in a packet engine that represents an operation associated with a packet processor that includes the packet engine, and providing the packet engine the status of the bit.

Abstract: A method and apparatus for remapping channel data are presented. Multiple successive frames carrying data in timeslots are received. The timeslots are assigned to channels so that data for the channels includes interleaved data. The data from the multiple successive frames for each of a predetermined number of the timeslots are aggregated. The aggregated data is mapped, by timeslot, to produce a timeslot-based map. The aggregated data of the timeslot-based map is remapped to produce a channel-based map in which the data for the channels are grouped together by channel in the order that the data were received.

Abstract: Systems and methods are disclosed for implementing software FIFOs on network processing engines (NPEs). The logic needed to support these software FIFOs is believed to be less than that needed to support additional hardware FIFOs, especially as the number of additional FIFOs is increased. Thus, the systems and methods enable NPEs to utilize more FIFOs at less cost. The counting semaphores that are used in the implementation of the software FIFOs can also, or alternatively, be used to provide NPEs with additional resource-locking and signaling functionality.