Patents by Inventor Nancy Chan
Nancy Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240082245Abstract: The present invention features interferon-free therapies for the treatment of HCV. Preferably, the treatment is over a shorter duration of treatment, such as no more than 12 weeks. In one aspect, the treatment comprises administering at least two direct acting antiviral agents to a subject with HCV infection, wherein the treatment lasts for 12 weeks and does not include administration of either interferon or ribavirin, and said at least two direct acting antiviral agents comprise (a) Compound 1 or a pharmaceutically acceptable salt thereof and (b) Compound 2 or a pharmaceutically acceptable salt thereof.Type: ApplicationFiled: November 3, 2023Publication date: March 14, 2024Inventors: Christine Collins, Bo Fu, Abhishek Gulati, Jens Kort, Matthew Kosloski, Yang Lei, Chih-Wei Lin, Ran Liu, Federico Mensa, Iok Chan NG, Tami Pilot-Matias, David Pugatch, Nancy S. Shulman, Roger Trinh, Rolando M. Viani, Stanley Wang, Zhenzhen Zhang
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Patent number: 9455722Abstract: In a method and apparatus for using a clock generating circuit to minimize settling time after dynamic power supply voltage ramping, a clock signal may be generated using a clock generating circuit having, among other things, open feedback loop switch logic and a dynamic fast lock control signal generator. Whereupon, when in operation, the open feedback loop switch logic is responsive to a controlled change in power supply voltage condition such that a feedback loop of the clock generating circuit is opened during power supply voltage ramping (e.g., during transitions to or from battery conservation modes). In response to opening the feedback loop, the dynamic fast lock control signal generator selectively applies a stabilizing control signal to a variable clock signal generator (e.g., a voltage controlled oscillator) such that the generated clock signal can quickly lock onto the proper target frequency.Type: GrantFiled: November 30, 2005Date of Patent: September 27, 2016Assignee: ATI Technologies ULCInventors: Shirley Lam, Nancy Chan, Mikhail Rodionov, Ramesh Senthinathan
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Patent number: 9348355Abstract: An apparatus includes a clock circuit and a plurality of display interface circuits. The clock circuit provides a common clock signal. The display interface circuits each provide a respective display link clock signal in response to the common clock signal. One of the display link clock signals is at a different clock speed that another of the display link clock signals.Type: GrantFiled: August 24, 2010Date of Patent: May 24, 2016Assignee: ATI Technologies ULCInventors: David I. J. Glen, Collis Quinn Carter, Natan Shtutman, Ngar Sze Nancy Chan, Michael Foxcroft
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Patent number: 8749534Abstract: A method and system of testing pixels output from a pixel generation unit under test includes generating pixels from the pixel generation unit under test using a first test data pattern to generate pixel information. The method and system also generate a per pixel error value for a pixel from the unit under test that contains an error based on the pixel by pixel comparison with pixel information generated substantially concurrently with pixels by a different unit using the first test data pattern. If desired, corresponding pixel screen location information (e.g., x-y location) can also be determined for the pixel that has the error. The per pixel error and x-y location information can be displayed.Type: GrantFiled: February 11, 2009Date of Patent: June 10, 2014Assignee: ATI Technologies ULCInventors: Albert Tung-chu Man, William Anthony Jonas, Stephen (Yun-Yee) Leung, Nancy Chan Ngar Sze
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Patent number: 8330476Abstract: A supply voltage management system and method for an integrated circuit (IC) die are provided. The supply voltage management system includes one or more temperature sensing elements located on the IC die and configured to sense temperature of the die and to output a sensed temperature value for the die. A dynamic voltage controller is located on the die and is configured to receive the sensed temperature value for the die and to identify a technology process category of the die. Based on the sensed temperature value and the identified technology process category of the die, the dynamic voltage controller adjusts an output voltage to at least one circuit of the die.Type: GrantFiled: August 31, 2005Date of Patent: December 11, 2012Assignee: ATI Technologies ULCInventors: Nancy Chan, Ramesh Senthinathan
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Patent number: 8286022Abstract: A differential serial communication receiver circuit automatically compensates for intrapair skew between received differential signals on a serial differential communication link, with deterministic skew adjustment set during a receiver training period. Intrapair skew refers to the skew within a pair of differential signals, and is hence interchangeable with the term differential skew in the context of this document. During the receiver training period, a training data pattern is received, such as alternating ones and zeros (e.g., a D10.2 pattern as is known in the art), rather than an actual data payload. The differential serial communication receiver circuit includes a differential skew compensation circuit to compensate for intrapair skew.Type: GrantFiled: January 12, 2009Date of Patent: October 9, 2012Assignee: ATI Technologies ULCInventors: Richard Fung, Ramesh Senthinathan, Nancy Chan
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Publication number: 20110066778Abstract: A differential serial communication transmitter (i.e. PCI Express or other suitable type of transmitter) can be used to transport and interoperate transition minimized differential signaling. The differential serial communication transmitter control logic receives display configuration control data and in response configures at least one differential serial communication transmitter of a plurality of differential serial communication transmitters in an integrated circuit for communication with a display (i.e. visual digital display) employing transition minimized differential signaling. For example, the integrated circuit, such as a graphics processor, may include the plurality of differential serial communication transmitters for communication with devices, such as a northbridge circuit and a display within a computer system.Type: ApplicationFiled: November 11, 2010Publication date: March 17, 2011Applicant: ATI TECHNOLOGIES ULCInventors: Nancy Chan, Ramesh Senthinathan
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Publication number: 20110060847Abstract: A differential serial communication transmitter (i.e. PCI Express or other suitable type of transmitter) can be used to transport and interoperate transition minimized differential signaling. The differential serial communication transmitter control logic receives display configuration control data and in response configures at least one differential serial communication transmitter of a plurality of differential serial communication transmitters in an integrated circuit for communication with a display (i.e. visual digital display) employing transition minimized differential signaling. For example, the integrated circuit, such as a graphics processor, may include the plurality of differential serial communication transmitters for communication with devices, such as a northbridge circuit and a display within a computer system.Type: ApplicationFiled: November 11, 2010Publication date: March 10, 2011Applicant: ATI TECHNOLOGIES ULCInventors: Nancy Chan, Ramesh Senthinathan
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Publication number: 20110050314Abstract: An apparatus includes a clock circuit and a plurality of display interface circuits. The clock circuit provides a common clock signal. The display interface circuits each provide a respective display link clock signal in response to the common clock signal. One of the display link clock signals is at a different clock speed that another of the display link clock signals.Type: ApplicationFiled: August 24, 2010Publication date: March 3, 2011Applicant: ATI TECHNOLOGIES ULCInventors: David I.J. Glen, Collis Quinn Carter, Natan Shtutman, Ngar Sze Nancy Chan, Michael Foxcroft
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Patent number: 7724037Abstract: The present disclosure relates to a differential signaling circuit including differential signaling circuitry having at least one output and one input, that can operate in multiple mode of operations while using a single, low voltage supply source. Two or more switches are included and configured to selectively couple a supply voltage to the output dependent on a mode of operation of the differential signaling circuitry. The circuit also includes a switch control biasing circuit operatively coupled to at least one of the switches and to the output of the differential signaling circuitry. The switch control biasing circuit provides a switch control biasing voltage to control a state of the switch based on a voltage level of the output. Further, a bulk biasing circuit is included and operatively coupled to the switch. The bulk biasing circuit selectively provides a bulk biasing voltage to the switch based on the voltage level of the output.Type: GrantFiled: January 13, 2009Date of Patent: May 25, 2010Assignee: ATI Technologies ULCInventors: Junho Cho, Nancy Chan, Ramesh Senthinathan, Stephen Yue, Richard W. Fung
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Publication number: 20090213226Abstract: A method and system of testing pixels output from a pixel generation unit under test includes generating pixels from the pixel generation unit under test using a first test data pattern to generate pixel information. The method and system also generate a per pixel error value for a pixel from the unit under test that contains an error based on the pixel by pixel comparison with pixel information generated substantially concurrently with pixels by a different unit using the first test data pattern. If desired, corresponding pixel screen location information (e.g., x-y location) can also be determined for the pixel that has the error. The per pixel error and x-y location information can be displayed.Type: ApplicationFiled: February 11, 2009Publication date: August 27, 2009Applicant: ATI Technologies ULCInventors: Albert Tung-chu Man, William Anthony Jonas, Stephen (Yun-Yee) Leung, Nancy Chan Ngar Sze
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Publication number: 20090121761Abstract: A differential serial communication receiver circuit automatically compensates for intrapair skew between received differential signals on a serial differential communication link, with deterministic skew adjustment set during a receiver training period. Intrapair skew refers to the skew within a pair of differential signals, and is hence interchangeable with the term differential skew in the context of this document. During the receiver training period, a training data pattern is received, such as alternating ones and zeros (e.g., a D10.2 pattern as is known in the art), rather than an actual data payload. The differential serial communication receiver circuit includes a differential skew compensation circuit to compensate for intrapair skew.Type: ApplicationFiled: January 12, 2009Publication date: May 14, 2009Applicant: ATI Technologies ULCInventors: Richard Fung, Ramesh Senthinathan, Nancy Chan
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Publication number: 20090115457Abstract: The present disclosure relates to a differential signaling circuit including differential signaling circuitry having at least one output and one input, that can operate in multiple mode of operations while using a single, low voltage supply source. Two or more switches are included and configured to selectively couple a supply voltage to the output dependent on a mode of operation of the differential signaling circuitry. The circuit also includes a switch control biasing circuit operatively coupled to at least one of the switches and to the output of the differential signaling circuitry. The switch control biasing circuit provides a switch control biasing voltage to control a state of the switch based on a voltage level of the output. Further, a bulk biasing circuit is included and operatively coupled to the switch. The bulk biasing circuit selectively provides a bulk biasing voltage to the switch based on the voltage level of the output.Type: ApplicationFiled: January 13, 2009Publication date: May 7, 2009Applicant: ATI Technologies ULCInventors: Junho Cho, Nancy Chan, Ramesh Senthinathan, Stephen Yue, Richard W. Fung
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Patent number: 7495477Abstract: The present disclosure relates to a differential signaling circuit including differential signaling circuitry having at least one output and one input, that can operate in multiple mode of operations while using a single, low voltage supply source. Two or more switches are included and configured to selectively couple a supply voltage to the output dependent on a mode of operation of the differential signaling circuitry. The circuit also includes a switch control biasing circuit operatively coupled to at least one of the switches and to the output of the differential signaling circuitry. The switch control biasing circuit provides a switch control biasing voltage to control a state of the switch based on a voltage level of the output. Further, a bulk biasing circuit is included and operatively coupled to the switch. The bulk biasing circuit selectively provides a bulk biasing voltage to the switch based on the voltage level of the output.Type: GrantFiled: July 31, 2007Date of Patent: February 24, 2009Assignee: ATI Technologies, Inc.Inventors: Junho Cho, Nancy Chan, Ramesh Senthinathan, Stephen Yue, Richard W. Fung
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Patent number: 7493509Abstract: A differential serial communication receiver circuit automatically compensates for intrapair skew between received differential signals on a serial differential communication link, with deterministic skew adjustment set during a receiver training period. Intrapair skew refers to the skew within a pair of differential signals, and is hence interchangeable with the term differential skew in the context of this document. During the receiver training period, a training data pattern is received, such as alternating ones and zeros (e.g., a D10.2 pattern as is known in the art), rather than an actual data payload. The differential serial communication receiver circuit includes a differential skew compensation circuit to compensate for intrapair skew.Type: GrantFiled: December 10, 2004Date of Patent: February 17, 2009Assignee: ATI Technologies ULCInventors: Richard Fung, Ramesh Senthinathan, Nancy Chan
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Patent number: 7319358Abstract: In a method and apparatus for generating a power supply voltage, an integrated circuit including an adaptive power supply voltage circuit is provided where a target signal is generated representing an ideal or approximated ideal performance characteristic of a functional block operating with the power supply voltage. A generated functional block test signal is generated representing the performance characteristic of the functional block under these conditions. The adaptive power supply voltage circuit compares the target signal with the generated functional block test signal and adjusts the power supply voltage continuously until the target signal and generated functional block test signal are substantially equal. When the target signal and generated functional block test signal are substantially equal, the power supply voltage is locked for subsequent use. By optimizing the power supply voltage, minimal power dissipation is provided.Type: GrantFiled: December 29, 2005Date of Patent: January 15, 2008Assignee: ATI Technologies Inc.Inventors: Ramesh Senthinathan, Nancy Chan
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Publication number: 20070268043Abstract: The present disclosure relates to a differential signaling circuit including differential signaling circuitry having at least one output and one input, that can operate in multiple mode of operations while using a single, low voltage supply source. Two or more switches are included and configured to selectively couple a supply voltage to the output dependent on a mode of operation of the differential signaling circuitry. The circuit also includes a switch control biasing circuit operatively coupled to at least one of the switches and to the output of the differential signaling circuitry. The switch control biasing circuit provides a switch control biasing voltage to control a state of the switch based on a voltage level of the output. Further, a bulk biasing circuit is included and operatively coupled to the switch. The bulk biasing circuit selectively provides a bulk biasing voltage to the switch based on the voltage level of the output.Type: ApplicationFiled: July 31, 2007Publication date: November 22, 2007Applicant: ATI Technologies ULCInventors: Junho Cho, Nancy Chan, Ramesh Senthinathan, Stephen Yue, Richard Fung
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Patent number: 7253663Abstract: The present disclosure relates to a differential signaling circuit including differential signaling circuitry having at least one output and one input, that can operate in multiple mode of operations while using a single, low voltage supply source. Two or more switches are included and configured to selectively couple a supply voltage to the output dependent on a mode of operation of the differential signaling circuitry. The circuit also includes a switch control biasing circuit operatively coupled to at least one of the switches and to the output of the differential signaling circuitry. The switch control biasing circuit provides a switch control biasing voltage to control a state of the switch based on a voltage level of the output. Further, a bulk biasing circuit is included and operatively coupled to the switch. The bulk biasing circuit selectively provides a bulk biasing voltage to the switch based on the voltage level of the output.Type: GrantFiled: June 15, 2005Date of Patent: August 7, 2007Assignee: ATI Technologies Inc.Inventors: Junho Cho, Nancy Chan, Ramesh Senthinathan, Stephen Yue, Richard W Fung
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Publication number: 20070152734Abstract: In a method and apparatus for generating a power supply voltage, an integrated circuit including an adaptive power supply voltage circuit is provided where a target signal is generated representing an ideal or approximated ideal performance characteristic of a functional block operating with the power supply voltage. A generated functional block test signal is generated representing the performance characteristic of the functional block under these conditions. The adaptive power supply voltage circuit compares the target signal with the generated functional block test signal and adjusts the power supply voltage continuously until the target signal and generated functional block test signal are substantially equal. When the target signal and generated functional block test signal are substantially equal, the power supply voltage is locked for subsequent use. By optimizing the power supply voltage, minimal power dissipation is provided.Type: ApplicationFiled: December 29, 2005Publication date: July 5, 2007Applicant: ATI TECHNOLOGIES INC.Inventors: Ramesh Senthinathan, Nancy Chan
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Patent number: D918721Type: GrantFiled: March 20, 2020Date of Patent: May 11, 2021Assignee: AKER BIOMARINE ANTARCTIC ASInventors: Susmita Vellanki, Nancy Chan, Helio Salema, Rutger Thiellier