Patents by Inventor Nandan Tripathi

Nandan Tripathi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for initializing an interface between two circuits of a communication device while a processor of the first circuit is inactive and waking up the processor thereafter
    Patent number: 8176340
    Abstract: A method and system for managing communications between sub-systems of a communication device. The sub-systems include a Radio Frequency Integrated Circuit (RFIC) and a Baseband Integrated Circuit (BBIC). The BBIC includes a processing engine, a state machine module and an interface module. The method includes initializing a Digital Radio Frequency Third Generation (DigRF3G) interface between the RFIC and the BBIC. The processing engine is kept functionally inactive during the initialization process of the DigRF3G interface. Further, the method includes exchanging one or more packets between the RFIC and the BBIC.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: May 8, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Nandan Tripathi, Rahul Garg, Vivek Goel, Rajan Kapoor, Sachin Prakash
  • Method and system for compensating for the effect of phase drift in a data sampling clock
    Patent number: 8050371
    Abstract: A method and system for compensating for the effect of phase drift in a data sampling clock during data transfer between sub-systems of an electronic device. The sub-systems of the electronic device transfer data frame by frame. Each frame includes multiple data windows. Each data window includes multiple data bits. The method includes sampling each of the one or more data bits of a data window at one or more early instances, a prompt instance, and one or more late instances. Further, the method includes calculating the phase-error value of the sampled data window, based on the data sampled. Furthermore, the method includes compensating for the effect of phase drift in the data sampling clock, based on the calculated phase error value.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: November 1, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Rahul Garg, Nandan Tripathi
  • METHOD AND SYSTEM FOR COMPENSATING FOR THE EFFECT OF PHASE DRIFT IN A DATA SAMPLING CLOCK
    Publication number: 20080267332
    Abstract: A method and system for compensating for the effect of phase drift in a data sampling clock during data transfer between sub-systems of an electronic device. The sub-systems of the electronic device transfer data frame by frame. Each frame includes multiple data windows. Each data window includes multiple data bits. The method includes sampling each of the one or more data bits of a data window at one or more early instances, a prompt instance, and one or more late instances. Further, the method includes calculating the phase-error value of the sampled data window, based on the data sampled. Furthermore, the method includes compensating for the effect of phase drift in the data sampling clock, based on the calculated phase error value.
    Type: Application
    Filed: April 7, 2008
    Publication date: October 30, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Rahul Garg, Nandan Tripathi
  • METHOD AND SYSTEM FOR MANAGING COMMUNICATIONS BETWEEN SUB-SYSTEMS OF A COMMUNICATION DEVICE
    Publication number: 20080186146
    Abstract: A method and system for managing communications between sub-systems of a communication device. The sub-systems include a Radio Frequency Integrated Circuit (RFIC) and a Baseband Integrated Circuit (BBIC). The BBIC includes a processing engine, a state machine module and an interface module. The method includes initializing a Digital Radio Frequency Third Generation (DigRF3G) interface between the RFIC and the BBIC. The processing engine is kept functionally inactive during the initialization process of the DigRF3G interface. Further, the method includes exchanging one or more packets between the RFIC and the BBIC.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 7, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Nandan Tripathi, Rahul Garg, Vivek Goel, Rajan Kapoor, Sachin Prakash