Patents by Inventor NANDINI MAHENDRAN

NANDINI MAHENDRAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11663986
    Abstract: The present disclosure is directed to systems and methods of optimizing display image quality on display devices having a plurality of display power modes.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: May 30, 2023
    Assignee: Intel Corporation
    Inventors: Junhai Qiu, Nandini Mahendran, Ajit Joshi, Shravan Kumar Belagal Math, Sherine Abdelhak
  • Publication number: 20220366861
    Abstract: The present disclosure is directed to systems and methods of optimizing display image quality on display devices having a plurality of display power modes.
    Type: Application
    Filed: May 3, 2022
    Publication date: November 17, 2022
    Inventors: Junhai Qiu, Nandini Mahendran, Ajit Joshi, Shravan Kumar Belagal Math, Sherine Abdelhak
  • Patent number: 11501733
    Abstract: The present disclosure is directed to systems and methods of transferring bulk data, such as OLED compensation mask data, generated by a source device to a sink device using a high-bandwidth embedded DisplayPort (eDP) connection contemporaneous with an ENABLED Panel Self-Refresh (PSR) mode. Upon ENABLING the PSR mode, the source control circuitry causes the source transmitter circuitry, the sink receiver circuitry, and the eDP high-bandwidth communication link to remain active rather than inactive. The source control circuitry generates one or more data transport units (DTUs) having a header portion that contains data indicative of the presence of a bulk data payload and the non-display status of the bulk data payload carried by the DTUs.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: November 15, 2022
    Assignee: Intel Corporation
    Inventors: Junhai Qiu, Ajit Joshi, Ravi Ranganathan, Perazhi Sameer Kalathil, Jun Jiang, Geethacharan Rajagopalan, Nandini Mahendran, Gary Smith
  • Patent number: 11348538
    Abstract: The present disclosure is directed to systems and methods of optimizing display image quality on display devices having a plurality of display power modes.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: May 31, 2022
    Assignee: Intel Corporation
    Inventors: Junhai Qiu, Nandini Mahendran, Ajit Joshi, Shravan Kumar Belagal Math, Sherine Abdelhak
  • Patent number: 11289006
    Abstract: Example display power management control circuitry is to determine a baseline image quality parameter associated with a baseline display power mode based on: a baseline first relationship parameter associated with a first relationship between original and boosted pixel values; a baseline percentage of pixels having a color value; and a baseline second relationship parameter associated with a second relationship between the numbers of original pixel values and boosted pixel values; determine a value of a subsequent first relationship parameter based on an adjusted second relationship parameter and a second percentage of pixels having the color value; determine a second image quality parameter associated with the subsequent first relationship parameter, the adjusted second relationship parameter, and the second percentage of pixels; and select the subsequent first relationship parameter and the adjusted second relationship parameter based on comparing the second image quality parameter to the baseline image qua
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: March 29, 2022
    Assignee: Intel Corporation
    Inventors: Junhai Qiu, Ajit Joshi, Jun Jiang, Sherine Abdelhak, Shravan Kumar Belagal Math, Nandini Mahendran
  • Publication number: 20210183300
    Abstract: Example display power management control circuitry is to determine a baseline image quality parameter associated with a baseline display power mode based on: a baseline first relationship parameter associated with a first relationship between original and boosted pixel values; a baseline percentage of pixels having a color value; and a baseline second relationship parameter associated with a second relationship between the numbers of original pixel values and boosted pixel values; determine a value of a subsequent first relationship parameter based on an adjusted second relationship parameter and a second percentage of pixels having the color value; determine a second image quality parameter associated with the subsequent first relationship parameter, the adjusted second relationship parameter, and the second percentage of pixels; and select the subsequent first relationship parameter and the adjusted second relationship parameter based on comparing the second image quality parameter to the baseline image qua
    Type: Application
    Filed: March 1, 2021
    Publication date: June 17, 2021
    Inventors: Junhai Qiu, Ajit Joshi, Jun Jiang, Sherine Abdelhak, Shravan Kumar Belagal Math, Nandini Mahendran
  • Publication number: 20210183322
    Abstract: The present disclosure is directed to systems and methods of optimizing display image quality on display devices having a plurality of display power modes.
    Type: Application
    Filed: February 26, 2021
    Publication date: June 17, 2021
    Inventors: Junhai Qiu, Nandini Mahendran, Ajit Joshi, Shravan Kumar Belagal Math, Sherine Abdelhak
  • Patent number: 10971085
    Abstract: The present disclosure is directed to systems and methods of optimizing display image quality on display devices having a plurality of display power modes. Each power mode has associated therewith a respective baseline allowable percentage of distorted pixels and a baseline first relationship between an original pixel value and boosted pixel value. Display control circuitry determines a baseline second relationship using the baseline percentage of distorted pixels and the baseline first relationship. The display control circuitry selects a plurality of test distorted original pixel values and determines a respective test first relationship. Using the test distorted original pixel value, the respective test first relationship, and the baseline second relationship, the display control circuitry determines a respective PSNR and value indicative of the change in display image quality for each of the test distorted original pixel values.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: April 6, 2021
    Assignee: Intel Corporation
    Inventors: Junhai Qiu, Nandini Mahendran, Ajit Joshi, Shravan Kumar Belagal Math, Sherine Abdelhak
  • Patent number: 10937358
    Abstract: The present disclosure is directed to systems and methods of reducing display image power consumption while maintaining image quality on display devices having a plurality of display power modes. Each display power mode has associated therewith a defined baseline value (K1,BASELINE) first relationship. A display image includes a baseline percentage under-boosted pixels (Xi,BASELINE). Using the first relationship value (K1,BASELINE) and the pixel percentage (Xi,BASELINE), a baseline second relationship value is determined (K0,BASELINE). The value associated with the second relationship is adjusted to a first plurality of values. At each value, the value associated with the pixel percentage is adjusted to each of a second plurality of values. At each combination of second relationship value and pixel percentage, a respective first relationship value is determined. A first relationship value, second relationship value are selected to provide a reduced power consumption while maintaining image quality.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Junhai Qiu, Ajit Joshi, Jun Jiang, Sherine Abdelhak, Shravan Kumar Belagal Math, Nandini Mahendran
  • Publication number: 20200126471
    Abstract: The present disclosure is directed to systems and methods of reducing display image power consumption while maintaining image quality on display devices having a plurality of display power modes. Each display power mode has associated therewith a defined baseline value (K1,BASELINE) first relationship. A display image includes a baseline percentage under-boosted pixels (Xi,BASELINE). Using the first relationship value (K1,BASELINE) and the pixel percentage (Xi,BASELINE), a baseline second relationship value is determined (K0,BASELINE). The value associated with the second relationship is adjusted to a first plurality of values. At each value, the value associated with the pixel percentage is adjusted to each of a second plurality of values. At each combination of second relationship value and pixel percentage, a respective first relationship value is determined. A first relationship value, second relationship value are selected to provide a reduced power consumption while maintaining image quality.
    Type: Application
    Filed: June 28, 2019
    Publication date: April 23, 2020
    Inventors: Junhai Qiu, Ajit Joshi, Jun Jiang, Sherine Abdelhak, Shravan Kumar Belagal Math, Nandini Mahendran
  • Publication number: 20200043440
    Abstract: The present disclosure is directed to systems and methods of transferring bulk data, such as OLED compensation mask data, generated by a source device to a sink device using a high-bandwidth embedded DisplayPort (eDP) connection contemporaneous with an ENABLED Panel Self-Refresh (PSR) mode. Upon ENABLING the PSR mode, the source control circuitry causes the source transmitter circuitry, the sink receiver circuitry, and the eDP high-bandwidth communication link to remain active rather than inactive. The source control circuitry generates one or more data transport units (DTUs) having a header portion that contains data indicative of the presence of a bulk data payload and the non-display status of the bulk data payload carried by the DTUs.
    Type: Application
    Filed: August 15, 2019
    Publication date: February 6, 2020
    Applicant: Intel Corporation
    Inventors: Junhai Qiu, Ajit Joshi, Ravi Ranganathan, Perazhi Sameer Kalathil, Jun Jiang, Geethacharan Rajagopalan, Nandini Mahendran, Gary Smith
  • Publication number: 20190147806
    Abstract: The present disclosure is directed to systems and methods of optimizing display image quality on display devices having a plurality of display power modes. Each power mode has associated therewith a respective baseline allowable percentage of distorted pixels and a baseline first relationship between an original pixel value and boosted pixel value. Display control circuitry determines a baseline second relationship using the baseline percentage of distorted pixels and the baseline first relationship. The display control circuitry selects a plurality of test distorted original pixel values and determines a respective test first relationship. Using the test distorted original pixel value, the respective test first relationship, and the baseline second relationship, the display control circuitry determines a respective PSNR and value indicative of the change in display image quality for each of the test distorted original pixel values.
    Type: Application
    Filed: January 8, 2019
    Publication date: May 16, 2019
    Inventors: JUNHAI QIU, NANDINI MAHENDRAN, AJIT JOSHI, SHRAVAN KUMAR BELAGAL MATH, SHERINE ABDELHAK