Patents by Inventor Nanlei Larry Wang
Nanlei Larry Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7345547Abstract: The embodiments of the present invention include a bias circuit for a power-amplifying device, which receives and amplifies an input RF signal having a series of RF cycles within a modulation envelop. The bias circuit compensates odd-order distortion processes by detecting the power in the input signal and providing a dynamic adjustment to a bias stimulus for the power-amplifying device within a time scale of the modulation envelope.Type: GrantFiled: October 17, 2005Date of Patent: March 18, 2008Assignee: WJ Communications, Inc.Inventors: Nanlei Larry Wang, Walter A. Strifler
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Patent number: 7012288Abstract: The safe-operating area (SOA) in a heterojunction bipolar transistor (HBT) is improved by providing a collector region in the transistor having a graded (uniformly or stepped) doping between the base region and the underlying subcollector region with the collector doping being lower near the base and higher near the subcollector and with the collector doping being less than the doping of the subcollector. The non-uniformly doped collector reduces Kirk effect induced breakdown when collector current increases.Type: GrantFiled: October 8, 2002Date of Patent: March 14, 2006Assignee: WJ Communications, Inc.Inventors: Chien Ping Lee, Hin Fai Chau, Nanlei Larry Wang, Clarence John Dunnrowicz, Yan Chen, Barry Jia-Fu Lin
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Publication number: 20040188712Abstract: The safe-operating area (SOA) in a heterojunction bipolar transistor (HBT) is improved by providing a collector region in the transistor having a graded (continuous or stepped) doping between the base region and the underlying subcollector region with the collector doping being lowest near the base and highest near the subcollector and with the collector doping being less than the doping of the subcollector. The non-uniformly doped collector reduces Kirk effect induced breakdown when collector current increases.Type: ApplicationFiled: April 7, 2004Publication date: September 30, 2004Applicant: EiC CorporationInventors: Chien Ping Lee, Frank Hin Fai Chau, Nanlei Larry Wang, Clarence John Dunnrowicz, Yan Chen, Barry Jia-Fu Lin
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Publication number: 20040065897Abstract: The safe-operating area (SOA) in a heterojunction bipolar transistor (HBT) is improved by providing a collector region in the transistor having a graded (uniformly or stepped) doping between the base region and the underlying subcollector region with the collector doping being lower near the base and higher near the subcollector and with the collector doping being less than the doping of the subcollector. The non-uniformly doped collector reduces Kirk effect induced breakdown when collector current increases.Type: ApplicationFiled: October 8, 2002Publication date: April 8, 2004Applicant: EiC CorporationInventors: Chien Ping Lee, Hin Fai Chau, Nanlei Larry Wang, Clarence John Dunnrowicz, Yan Chen, Barry Jia-Fu Lin
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Patent number: 6700076Abstract: An electronic module includes an interconnect module having a plurality of metal layers separated by a plurality of dielectric layers in a stacked structure with electronic components mounted on one surface of the module. The electronic components are selectively interconnected by drilling via holes completely through all dielectric layers with a conductive material such as solder in each via contacting metal layers to be interconnected and each metal layer which is not connected by a via having a metal pattern devoid of metal at the via location. For via connecting non-ground layers, there will be a patch of solder mask on the backside ground layer to electrically prevent this via from inadvertently connecting to ground.Type: GrantFiled: February 1, 2002Date of Patent: March 2, 2004Assignee: EIC CorporationInventors: Xiao-Peng Sun, Nanlei Larry Wang
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Patent number: 6556082Abstract: A temperature compensating circuit for use with a current mirror circuit for maintaining a reference current value during temperature variations includes a compensating transistor connected in parallel with a reference current transistor and bias circuitry for biasing the compensating transistor whereby current flows from the reference node to ground through the compensating transistor to remove excess current from the reference transistor when temperature increases. A diode can be included in the bias circuitry for limiting bias current flow when the reference voltage drops below the voltage drop of the diode. An on/off switch circuit can be provided in parallel with the reference current transistor to further reduce reference current in specific applications.Type: GrantFiled: October 12, 2001Date of Patent: April 29, 2003Assignee: EiC CorporationInventors: Nanlei Larry Wang, Sarah Xu, Shuo-Yuan Hsiao
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Publication number: 20030071688Abstract: A temperature compensating circuit for use with a current mirror circuit for maintaining a reference current value during temperature variations includes a compensating transistor connected in parallel with a reference current transistor and bias circuitry for biasing the compensating transistor whereby current flows from the reference node to ground through the compensating transistor to remove excess current from the reference transistor when temperature increases. A diode can be included in the bias circuitry for limiting bias current flow when the reference voltage drops below the voltage drop of the diode. An on/off switch circuit can be provided in parallel with the reference current transistor to further reduce reference current in specific applications.Type: ApplicationFiled: October 12, 2001Publication date: April 17, 2003Applicant: EiC CorporationInventors: Nanlei Larry Wang, Sarah Xu, Shuo-Yuan Hsiao
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Patent number: 6521972Abstract: An RF microwave power transistor has an input/output feed structure which functions as a low impedance microstrip line by providing a ground plane in close proximity to the feed structure on one surface of a semiconductor body. A second ground plane can be provided on an opposing surface of the semiconductor body with vias interconnecting the first and second ground planes. In addition to reducing feed impedance, a larger total transistor size can be provided before “odd mode oscillation” occurs.Type: GrantFiled: September 28, 2000Date of Patent: February 18, 2003Assignee: EiC CorporationInventors: Wei-Shu Zhou, Shuo-Yuan Hsiao, Nanlei Larry Wang
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Publication number: 20020105083Abstract: An electronic module includes an interconnect module having a plurality of metal layers separated by a plurality of dielectric layers in a stacked structure with electronic components mounted on one surface of the module. The electronic components are selectively interconnected by drilling via holes completely through all dielectric layers with a conductive material such as solder in each via contacting metal layers to be interconnected and each metal layer which is not connected by a via having a metal pattern devoid of metal at the via location. For via connecting non-ground layers, there will be a patch of solder mask on the backside ground layer to electrically prevent this via from inadvertently connecting to ground.Type: ApplicationFiled: February 1, 2002Publication date: August 8, 2002Applicant: EiC CorporationInventors: Xiao-Peng Sun, Nanlei Larry Wang
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Publication number: 20020097094Abstract: A hybrid microwave and millimeter wave integrated circuit (MMIC) RF power amplifier includes an integrated circuit in which an amplifier circuit is fabricated and an output impedance matching network comprising metal-insulator-metal (MIM) capacitors mounted on the integrated circuit chip with bonding wire inductors connecting the amplifier circuit with the capacitor elements. The resulting structure has a smaller form factor as compared to conventional power amplifiers employing planar transmission lines and surface mount technology capacitors.Type: ApplicationFiled: January 19, 2001Publication date: July 25, 2002Applicant: EiC CorporationInventors: Nanlei Larry Wang, Shuo-Yuan Hsiao, Xiao-Peng Sun
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Patent number: 6424223Abstract: A hybrid microwave and millimeter wave integrated circuit (MMIC) RF power amplifier includes an integrated circuit in which an amplifier circuit is fabricated and an output impedance matching network comprising metal-insulator-metal (MIM) capacitors mounted on the integrated circuit chip with bonding wire inductors connecting the amplifier circuit with the capacitor elements. The resulting structure has a smaller form factor as compared to conventional power amplifiers employing planar transmission lines and surface mount technology capacitors.Type: GrantFiled: January 19, 2001Date of Patent: July 23, 2002Assignee: EiC CorporationInventors: Nanlei Larry Wang, Shuo-Yuan Hsiao, Xiao-Peng Sun
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Patent number: 6326849Abstract: In an RF amplifier circuit having a plurality of transistor stages with each transistor having an input terminal for receiving an RF signal, a bias circuit is provided for applying a DC bias to the input terminal of a transistor. An isolation circuit connects a DC power supply to a bias circuit whereby DC voltage from the power terminal is applied to the bias circuit and RF signal from the transistor input terminal is attenuated. The isolation circuit includes a reactive serial path which allows the flow of DC current and presents an impedance to RF current flow and a reactive shunt path to ground which can comprise a capacitor or a serial inductor/capacitor circuit. The reactive serial path can comprise an inductor or an inductor/capacitor parallel circuit.Type: GrantFiled: September 28, 2000Date of Patent: December 4, 2001Assignee: EiC CorporationInventors: Nanlei Larry Wang, Shuo-Yuan Hsiao, Wei-Shu Zhou, Shihui Xu
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Patent number: 5878332Abstract: An RF transceiver operable in two separate frequency bands has transmitter and receiver elements with broadband components to provide a flat frequency response across the two separate operating frequency bands. The broadband transmitting and receiving elements are utilized with other narrow band components which are designed for operating in either the first frequency band or the second frequency band. The use of common components for operating in both frequency bands reduces part count and cost along with reduced size and weight.Type: GrantFiled: February 7, 1997Date of Patent: March 2, 1999Assignee: EIC Enterprises CorporationInventors: Nanlei Larry Wang, Ronald Patrick Green
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Patent number: 5869985Abstract: A differential input buffer operable at power supply voltages below 3.0 V comprises first and second field effect transistors connected between a power supply and a current source as a differential pair in receiving input and input bar signals. Using enhancement mode field effect transistors and heterojunction bipolar transistors for a current source, a power supply voltage Vcc as low as 2 V is possible for circuit operation.Type: GrantFiled: February 7, 1997Date of Patent: February 9, 1999Assignee: EIC Enterprises CorporationInventors: Nanlei Larry Wang, Ronald Patrick Green
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Patent number: 5864226Abstract: A low voltage regulator integrated circuit for high speed/high frequency circuits incorporates a field effect transistor switch with a heterojunction bipolar transistor in order to reduce voltage requirements of the circuit and allow lower power voltages to be regulated. A first field effect transistor connects an unregulated power input terminal to a regulated power output terminal with a bias circuit including the heterojunction bipolar transistor provided to maintain conductance of the field effect transistor in regulating a voltage on the output terminal. A second field effect transistor can be included in the circuit to provide a power down or power saving mode of operation. An input voltage range of the voltage regulator is reduced from 3-3.5 V to 2-2.3 V using the integrated field effect transistor/heterojunction bipolar transistor device structure.Type: GrantFiled: February 7, 1997Date of Patent: January 26, 1999Assignee: EIC Enterprises Corp.Inventors: Nanlei Larry Wang, Ronald Patrick Green