Abstract: An electronic circuit is provided for comparing a plurality of input signals and indicating and/or selecting the maximum or minimum signal from the input set. The plurality of input signals are amplified, logarithmically compressed, and buffered by a corresponding plurality of simple transistor circuits, which are substantially identical. The buffered input signals are provided to a high resolution multiple input comparator circuit. The comparator circuit comprises a two-stage emitter-coupled comparator and a single stage inverter-amplifier. In the first comparator stage, strong input signals share the bias current but all the weak signals drop out. The inverter-amplifier stage amplifies the differences between the strong signals that survive the first comparison stage. The second stage comparator determines the strongest of the few remaining signals.