Patents by Inventor Nao SUGANUMA

Nao SUGANUMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240072110
    Abstract: Provided is a semiconductor device including a transistor portion, in which the transistor portion has a drift region of a first conductivity type provided in a semiconductor substrate, a base region of a second conductivity type provided above the drift region, an accumulation region of the first conductivity type provided above the drift region, a plurality of trench portions provided to extend from a front surface of the semiconductor substrate to the drift region, and a trench bottom portion of the second conductivity type provided in bottom portions of the plurality of trench portions, and the accumulation region has a doping concentration with a half width of 0.3 ?m or more.
    Type: Application
    Filed: July 24, 2023
    Publication date: February 29, 2024
    Inventors: Nao SUGANUMA, Yosuke SAKURAI, Seiji NOGUCHI, Ryutaro HAMASAKI, Takuya YAMADA
  • Publication number: 20230369137
    Abstract: A semiconductor device includes trench portions arrayed in a first direction on an upper surface side of a semiconductor substrate, a first conductivity type lower surface region provided in a part of a lower surface of the semiconductor substrate, a second conductivity type base region provided on the upper surface side, a first conductivity type first region disposed between the base region and the lower surface region, a first conductivity type upper surface region provided on an upper surface of the semiconductor substrate, and a second conductivity type bottom region disposed continuously in the first direction to be in contact with bottom portions of the trench portions. In a cross section along the first direction and perpendicular to the upper and lower surfaces and passing through the lower surface region, one end portion of the bottom region in the first direction locates directly above the lower surface region.
    Type: Application
    Filed: July 14, 2023
    Publication date: November 16, 2023
    Inventors: Motoyoshi KUBOUCHI, Kosuke YOSHIDA, Soichi YOSHIDA, Koh YOSHIKAWA, Nao SUGANUMA
  • Patent number: 11742249
    Abstract: A fabrication method for a semiconductor device includes measuring a thickness of a semiconductor substrate in which a bulk donor of a first conductivity type is entirely distributed, adjusting an implantation condition in accordance with the thickness of the semiconductor substrate and implanting hydrogen ions from a lower surface of the semiconductor substrate to an upper surface side of the semiconductor substrate, and annealing the semiconductor substrate and forming, in a passage region through which the hydrogen ions have passed, a first high concentration region of the first conductivity type in which a donor concentration is higher than a doping concentration of the bulk donor.
    Type: Grant
    Filed: September 5, 2022
    Date of Patent: August 29, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Motoyoshi Kubouchi, Kosuke Yoshida, Soichi Yoshida, Koh Yoshikawa, Nao Suganuma
  • Publication number: 20230085529
    Abstract: Provided is a semiconductor device including: a semiconductor substrate having a drift region of a first conductivity type; an active portion, in which at least one of a transistor portion and a diode portion is provided, in the semiconductor substrate; and an edge termination structure portion provided farther outward than the active portion in the semiconductor substrate, wherein the edge termination structure portion has a plurality of guard rings of a second conductivity type provided in contact with an upper surface of the semiconductor substrate, and an embedded dielectric film arranged between two guard rings and at least partially embedded in the semiconductor substrate, and the guard rings are provided up to a position below the embedded dielectric film.
    Type: Application
    Filed: August 22, 2022
    Publication date: March 16, 2023
    Inventors: Kosuke YOSHIDA, Koh Yoshikawa, Nao Suganuma
  • Publication number: 20230081512
    Abstract: Provided is a semiconductor device including a semiconductor substrate having a first dopant of a first conductivity type and a second dopant of a second conductivity type, both the first dopant and the second dopant being distributed in an entire part of the semiconductor substrate, the semiconductor substrate including a drift region of the first conductivity type, a dielectric film provided on an upper surface of the semiconductor substrate, a high concentration region of the first conductivity type provided in contact with the dielectric film below the dielectric film and having a higher doping concentration than the drift region, and a fall off region that is provided in contact with the dielectric film below the dielectric film and in which a concentration of the dopant of the second conductivity type decreases toward the dielectric film.
    Type: Application
    Filed: August 22, 2022
    Publication date: March 16, 2023
    Inventors: Koh YOSHIKAWA, Kosuke YOSHIDA, Nao SUGANUMA
  • Publication number: 20230040096
    Abstract: A fabrication method for a semiconductor device includes measuring a thickness of a semiconductor substrate in which a bulk donor of a first conductivity type is entirely distributed, adjusting an implantation condition in accordance with the thickness of the semiconductor substrate and implanting hydrogen ions from a lower surface of the semiconductor substrate to an upper surface side of the semiconductor substrate, and annealing the semiconductor substrate and forming, in a passage region through which the hydrogen ions have passed, a first high concentration region of the first conductivity type in which a donor concentration is higher than a doping concentration of the bulk donor.
    Type: Application
    Filed: September 5, 2022
    Publication date: February 9, 2023
    Inventors: Motoyoshi KUBOUCHI, Kosuke YOSHIDA, Soichi YOSHIDA, Koh YOSHIKAWA, Nao SUGANUMA
  • Patent number: 11450734
    Abstract: A semiconductor device includes an edge terminal structure portion provided between the active portion and an end portion of the semiconductor substrate on an upper surface of the semiconductor substrate, in which the edge terminal structure portion has a first high concentration region of the first conductivity type which has a donor concentration higher than a doping concentration of the bulk donor in a region between the upper surface and a lower surface of the semiconductor substrate, an upper surface of the first high concentration region is located on an upper surface side of the semiconductor substrate, and a lower surface of the first high concentration region is located on a lower surface side of the semiconductor substrate.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: September 20, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Motoyoshi Kubouchi, Kosuke Yoshida, Soichi Yoshida, Koh Yoshikawa, Nao Suganuma
  • Publication number: 20220084828
    Abstract: Provided is a semiconductor apparatus including: a first peak of a hydrogen chemical concentration disposed on the lower surface side of the semiconductor substrate; and a flat portion disposed on the upper surface side of the semiconductor substrate with respect to the first peak, containing a hydrogen donor, and having a substantially (almost) flat donor concentration distribution in a depth direction. An oxygen contribution ratio indicating a ratio of an oxygen chemical concentration contributing to generation of the hydrogen donor in the oxygen chemical concentration of the oxygen ranges from 1×10?5 to 7×10?4. A concentration of the oxygen contributing to generation of the hydrogen donor in the flat portion is lower than the hydrogen chemical concentration. A hydrogen donor concentration in the flat portion ranges from 2×1012/cm3 to 5×1014/cm3.
    Type: Application
    Filed: November 24, 2021
    Publication date: March 17, 2022
    Inventors: Kosuke YOSHIDA, Takashi YOSHIMURA, Hiroshi TAKISHITA, Misaki UCHIDA, Michio NEMOTO, Nao SUGANUMA, Motoyoshi KUBOUCHI
  • Publication number: 20210359116
    Abstract: Provided is a semiconductor apparatus comprising: an emitter region having a first conductivity type provided on a front surface of a semiconductor substrate; a first gate trench part and a second gate trench part in contact with the emitter region; a first emitter non-contact trench part and a second emitter non-contact trench part out of contact with the emitter region; a gate pad for setting the first gate trench part, the second gate trench part, the first emitter non-contact trench part, and the second emitter non-contact trench part to gate potential; and a diode having an anode connected to the gate pad and a cathode connected to the first emitter non-contact trench part and the second emitter non-contact trench part, wherein the first gate trench part, the first emitter non-contact trench part, the second gate trench part, and the second emitter non-contact trench part are adjacently arranged in order.
    Type: Application
    Filed: March 23, 2021
    Publication date: November 18, 2021
    Inventors: Kosuke YOSHIDA, Nao SUGANUMA
  • Publication number: 20200395215
    Abstract: A semiconductor device includes an edge terminal structure portion provided between the active portion and an end portion of the semiconductor substrate on an upper surface of the semiconductor substrate, in which the edge terminal structure portion has a first high concentration region of the first conductivity type which has a donor concentration higher than a doping concentration of the bulk donor in a region between the upper surface and a lower surface of the semiconductor substrate, an upper surface of the first high concentration region is located on an upper surface side of the semiconductor substrate, and a lower surface of the first high concentration region is located on a lower surface side of the semiconductor substrate.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 17, 2020
    Inventors: Motoyoshi KUBOUCHI, Kosuke YOSHIDA, Soichi YOSHIDA, Koh YOSHIKAWA, Nao SUGANUMA