Patents by Inventor Naofumi Okayama

Naofumi Okayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070121304
    Abstract: The invention provides a printed circuit board capable of preventing an electronic component from tilting or uplifting without adopting special structures in an existing electronic component. The printed circuit board has an engagement portion and terminal holes and for mounting an electronic component, comprising narrowed portions and having substantially the same width as the mounting leg portions and connecting terminals of the electronic component, and guidance portions having a width wider than the narrowed portion, wherein the mounting leg portions and connecting terminals are inserted to the guidance portion, and the electronic component is moved via sliding motion, by which the mounting leg portions and the connecting terminals are supported tightly in the narrowed portion. Thus, it becomes possible to prevent the displacement or tilt of the electronic component.
    Type: Application
    Filed: November 27, 2006
    Publication date: May 31, 2007
    Applicant: ORION ELECTRIC CO., LTD.
    Inventors: Naofumi Okayama, Yoshiyuki Miyajima, Kiyozumi Gotou
  • Publication number: 20070074088
    Abstract: The invention provides a disk reproducing apparatus and a disk reproducing method capable of reducing constrained reproduction by reproducing another type of reproducible data for the portion in which the designated type of data cannot be reproduced. In step S250, it is determined whether there is an error in the reproducing audio data or not, and if there is an error in the reproducing audio data, the procedure advances to step S260. In step S260, it is determined whether there are errors in all the audio data, and if there are errors in all the data, the procedure advances to step S270, whereas if not, the procedure advances to step S310. In step S270, it is determined that audio is not to be output. In step S310 and onward, other reproducible data are reproduced.
    Type: Application
    Filed: August 21, 2006
    Publication date: March 29, 2007
    Applicant: ORION ELECTRIC CO., LTD.
    Inventors: Naofumi Okayama, Kiyozumi Gotou
  • Publication number: 20070020959
    Abstract: A plurality of jacks are a video signal jack, a left audio signal jack, and a right audio signal jack from left to right. Jack fixing protrusions are formed on a surface of each jack which surface is attached to a circuit board. The jack fixing protrusions are arranged differently among the respective jacks, and can be inserted only into attachment portions of the circuit board corresponding to the respective jacks. Namely, insertion of the respective jacks into incorrect attachment portions is made physically impossible, and erroneous insertion of the jacks can be prevented.
    Type: Application
    Filed: July 14, 2006
    Publication date: January 25, 2007
    Inventors: Toshihiko Sasaki, Toshio Ishimoto, Masayoshi Terashima, Naofumi Okayama
  • Publication number: 20070017699
    Abstract: A pair of through holes are formed in a circuit board, and a silver paste filled up in the through holes connects lands formed on a front surface and a rear surface of the circuit board, respectively to each other. When the silver paste is solidified, the silver paste bulges curvedly from the front and rear surfaces of the circuit board and forms a bump. A surface of the bump is covered with an overcoat. An electronic component is brought into contact with the bump, thereby forming a degassing gap between the electronic component and the circuit board. A gas generated during soldering is discharged from the penetrating hole, into which the lead terminal is inserted, to an outside via the gap between the electronic component and the circuit board.
    Type: Application
    Filed: July 14, 2006
    Publication date: January 25, 2007
    Inventors: Toshio Ishimoto, Toshihiko Sasaki, Naofumi Okayama, Masayoshi Terashima
  • Publication number: 20060200332
    Abstract: A pattern design of a film for manufacturing a printed circuit board is made by using a CAD system, and a plurality of types of Gerber data are produced in which a series of various data has been encoded. For example, a pattern film is formed by combining pattern Gerber data with pattern cut Gerber data. Data for check marks whose sizes are different from each other is added as well as pattern data to each Gerber data such that their central coordinates are to be the same. In this manner, a judgment mark having the check marks combined therewith is formed on the pattern film having the items of Gerber data combined therewith.
    Type: Application
    Filed: February 10, 2006
    Publication date: September 7, 2006
    Inventors: Toshio Ishimoto, Naofumi Okayama, Toshihiko Sasaki
  • Publication number: 20060067062
    Abstract: To provide a grounding structure for connecting and fixing a printed circuit board and a conductive frame to a conductive chassis of an electronic apparatus, the height of solder applied to the grounding land is made uniform, thereby ensuring electrical connection between the printed circuit board and the conductive chassis. A copper-foil coating 54 formed on a printed circuit board 50 is divided by a substantially-lattice-shaped resist 55 to form a grounding land 56 including a plurality of obliquely elongated land elements 56c in an area close to the edge of an opening 51 and a plurality of rhombic land elements 56a in the remaining area, and the grounding land 56 is brought into contact with and screw-clamped to a conductive chassis 60 using a locking leg 41.
    Type: Application
    Filed: September 15, 2005
    Publication date: March 30, 2006
    Applicant: ORION ELECTRIC CO., LTD.
    Inventors: Toshio Ishimoto, Naofumi Okayama, Toshihiko Sasaki
  • Publication number: 20050284653
    Abstract: When designing and arranging an electronic part such as a PC card connector on a wiring board using a CAD device, it is an object of the present invention to provide a condition display method for a wiring board design with excellent practicability capable of efficiently arranging other electronic parts lower than the height of a gap produced between the card connector and the underlying wiring board in the gap area. The method includes the steps of reading shape/size data of a PC card connector or the like producing a gap in an underlying part from an electronic parts catalog thereof, inputting gap area data and height limits which falls within an allowable height range in the gap area in a CAD menu of the wiring board design CAD device, thereby partitioning and displaying mountable areas with a height limit on a drawing of the wiring board with lines indicating the areas and displaying height limits of electronic parts that can be arranged in the mountable areas.
    Type: Application
    Filed: June 22, 2005
    Publication date: December 29, 2005
    Applicant: ORION ELECTRIC CO., LTD
    Inventor: Naofumi Okayama