Patents by Inventor Naoharu Nakaiso

Naoharu Nakaiso has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200185237
    Abstract: There is provided a technique that includes: etching a portion of a first film formed on a surface of a substrate by performing a cycle a predetermined number of times, the cycle including: supplying an etching gas into a process chamber while raising an internal pressure of the process chamber in a state in which the substrate having the first film formed on the surface of the substrate is accommodated in the process chamber; and lowering the internal pressure of the process chamber by exhausting an interior of the process chamber in a state in which supply of the etching gas into the process chamber is stopped.
    Type: Application
    Filed: February 13, 2020
    Publication date: June 11, 2020
    Applicant: KOKUSAI ELECTRIC CORPORATION
    Inventors: Kensuke HAGA, Atsushi MORIYA, Naoharu NAKAISO, Takahiro MIYAKURA
  • Patent number: 10529560
    Abstract: There is provided a technique that includes (a) pre-etching a surface of a substrate made of single crystal silicon by supplying a first etching gas to the substrate; (b) forming a silicon film on the substrate with the pre-etched surface, by supplying a first silicon-containing gas to the substrate; (c) etching a portion of the silicon film by supplying a second etching gas, which has a different molecular structure from a molecular structure of the first etching gas, to the substrate; and (d) forming an additional silicon film on the etched silicon film by supplying a second silicon-containing gas to the substrate.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: January 7, 2020
    Assignee: Kokusai Electric Corporation
    Inventors: Takahiro Miyakura, Atsushi Moriya, Naoharu Nakaiso, Kensuke Haga
  • Publication number: 20190279877
    Abstract: There is provided a technique that includes partially etching a film formed on a surface of a substrate by performing a cycle a predetermined number of times, the cycle including: (a) setting a temperature of the substrate having the first film formed on the surface to a first temperature; (b) stabilizing an in-plane temperature of the substrate at the first temperature; and (c) lowering the temperature of the substrate having the in-plane temperature stabilized at the first temperature from the first temperature to a second temperature that is lower than the first temperature, wherein in (c), an etching gas is supplied to the substrate for a predetermined period.
    Type: Application
    Filed: March 11, 2019
    Publication date: September 12, 2019
    Applicant: KOKUSAI ELECTRIC CORPORATION
    Inventors: Kotaro MURAKAMI, Naoharu NAKAISO, Tetsuya TAKAHASHI, Atsushi MORIYA
  • Patent number: 10262872
    Abstract: There is provided a method of manufacturing a semiconductor device. The method includes: forming a first amorphous silicon film on a substrate in a process chamber; and etching a portion of the first amorphous silicon film using a hydrogen chloride gas under a temperature at which an amorphous state of the first amorphous silicon film is maintained, in the process chamber.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: April 16, 2019
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Takahiro Miyakura, Atsushi Moriya, Naoharu Nakaiso, Kensuke Haga
  • Patent number: 10199219
    Abstract: There is provided a method of manufacturing a semiconductor device, which includes: forming a first seed layer containing silicon and germanium on a substrate by performing, a predetermined number of times, a cycle which includes supplying a first process gas containing silicon or germanium and containing a halogen element to the substrate, supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing germanium and not containing a halogen element to the substrate; and forming a germanium-containing film on the first seed layer by supplying a fourth process gas containing germanium and not containing a halogen element to the substrate.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: February 5, 2019
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Satoshi Shimamoto, Yoshiro Hirose, Hajime Karasawa, Ryota Horiike, Naoharu Nakaiso, Yoshitomo Hashimoto
  • Publication number: 20180277364
    Abstract: There is provided a technique that includes (a) pre-etching a surface of a substrate made of single crystal silicon by supplying a first etching gas to the substrate; (b) forming a silicon film on the substrate with the pre-etched surface, by supplying a first silicon-containing gas to the substrate; (c) etching a portion of the silicon film by supplying a second etching gas, which has a different molecular structure from a molecular structure of the first etching gas, to the substrate; and (d) forming an additional silicon film on the etched silicon film by supplying a second silicon-containing gas to the substrate.
    Type: Application
    Filed: March 20, 2018
    Publication date: September 27, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takahiro MIYAKURA, Atsushi MORIYA, Naoharu NAKAISO, Kensuke HAGA
  • Patent number: 9997354
    Abstract: There is provided a method of manufacturing a semiconductor device, including forming a seed layer on a substrate by performing a cycle a predetermined number of times, the cycle including supplying a halogen-based first processing gas to the substrate; supplying a non-halogen-based second processing gas to the substrate; and supplying a hydrogen-containing gas to the substrate. Further, the method further includes forming a film on the seed layer by supplying a third processing gas to the substrate.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: June 12, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yugo Orihashi, Kazuhiro Yuasa, Atsushi Moriya, Naoharu Nakaiso
  • Patent number: 9941119
    Abstract: A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: April 10, 2018
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi Moriya, Naoharu Nakaiso, Yugo Orihashi, Kotaro Murakami
  • Publication number: 20180040475
    Abstract: There is provided a method of manufacturing a semiconductor device. The method includes: forming a first amorphous silicon film on a substrate in a process chamber; and etching a portion of the first amorphous silicon film using a hydrogen chloride gas under a temperature at which an amorphous state of the first amorphous silicon film is maintained, in the process chamber.
    Type: Application
    Filed: August 1, 2017
    Publication date: February 8, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takahiro MIYAKURA, Atsushi MORIYA, Naoharu NAKAISO, Kensuke HAGA
  • Publication number: 20170365467
    Abstract: There is provided a method of manufacturing a semiconductor device, which includes: forming a first seed layer containing silicon and germanium on a substrate by performing, a predetermined number of times, a cycle which includes supplying a first process gas containing silicon or germanium and containing a halogen element to the substrate, supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing germanium and not containing a halogen element to the substrate; and forming a germanium-containing film on the first seed layer by supplying a fourth process gas containing germanium and not containing a halogen element to the substrate.
    Type: Application
    Filed: June 12, 2017
    Publication date: December 21, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Satoshi SHIMAMOTO, Yoshiro HIROSE, Hajime KARASAWA, Ryota HORIIKE, Naoharu NAKAISO, Yoshitomo HASHIMOTO
  • Publication number: 20170263441
    Abstract: There is provided a method of manufacturing a semiconductor device, including forming a seed layer on a substrate by performing a cycle a predetermined number of times, the cycle including supplying a halogen-based first processing gas to the substrate; supplying a non-halogen-based second processing gas to the substrate; and supplying a hydrogen-containing gas to the substrate. Further, the method further includes forming a film on the seed layer by supplying a third processing gas to the substrate.
    Type: Application
    Filed: March 2, 2017
    Publication date: September 14, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yugo ORIHASHI, Kazuhiro YUASA, Atsushi MORIYA, Naoharu NAKAISO
  • Publication number: 20170213727
    Abstract: A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.
    Type: Application
    Filed: March 24, 2017
    Publication date: July 27, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi MORIYA, Naoharu NAKAISO, Yugo ORIHASHI, Kotaro MURAKAMI
  • Patent number: 9691609
    Abstract: A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: June 27, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi Moriya, Naoharu Nakaiso, Yugo Orihashi, Kotaro Murakami
  • Patent number: 9646826
    Abstract: A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: May 9, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi Moriya, Naoharu Nakaiso, Yugo Orihashi, Kotaro Murakami
  • Publication number: 20170084455
    Abstract: A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.
    Type: Application
    Filed: December 2, 2016
    Publication date: March 23, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi MORIYA, Naoharu NAKAISO, Yugo ORIHASHI, Kotaro MURAKAMI
  • Patent number: 9540728
    Abstract: A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: January 10, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi Moriya, Naoharu Nakaiso, Yugo Orihashi, Kotaro Murakami
  • Publication number: 20160305023
    Abstract: A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.
    Type: Application
    Filed: June 23, 2016
    Publication date: October 20, 2016
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi MORIYA, Naoharu NAKAISO, Yugo ORIHASHI, Kotaro MURAKAMI
  • Patent number: 9437426
    Abstract: A method of manufacturing a semiconductor device including: a process of transferring a substrate into a processing chamber; a first gas supplying process of supplying a B atom-containing gas into the processing chamber; a first purging process of purging an inside of the processing chamber under an atmosphere of the B atom-containing gas supplied in the first gas supplying process; a second gas supplying process of supplying an Si atom-containing gas into the processing chamber to form a non-doped Si film on the substrate, after the first purging process; and a second purging process of purging the inside of the processing chamber under an atmosphere of the Si atom-containing gas.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: September 6, 2016
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Naoharu Nakaiso, Kazuhiro Yuasa, Yuki Kitahara
  • Patent number: 9412587
    Abstract: A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: August 9, 2016
    Assignee: HITACHI KOKUSAI ELECTRIC, INC.
    Inventors: Atsushi Moriya, Naoharu Nakaiso, Yugo Orihashi, Kotaro Murakami
  • Publication number: 20160141173
    Abstract: A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.
    Type: Application
    Filed: November 2, 2015
    Publication date: May 19, 2016
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi MORIYA, Naoharu NAKAISO, Yugo ORIHASHI, Kotaro MURAKAMI