Patents by Inventor Naohiko Hirano

Naohiko Hirano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10081852
    Abstract: A mixed mother alloy is prepared from a solder mixture comprising a pyrolyzable flux and high melting point metal particles, the mixed mother alloy is charged into a large amount of molten solder and stirred, and a billet is prepared. The billet can then be extruded, rolled, and punched to form a pellet or a washer, for example.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: September 25, 2018
    Assignees: Senju Metal Industry Co., Ltd., Denso Corporation
    Inventors: Naohiko Hirano, Akira Tanahashi, Yoshitsugu Sakamoto, Kaichi Tsuruta, Takashi Ishii, Satoshi Soga
  • Patent number: 10002841
    Abstract: Electrode pads disposed on a first surface of a semiconductor element include a first pad located close to a corner and a second pad located apart from the corner compared with the first pad. A first wire connected to the first pad has a smaller Young's modulus than a second wire connected to the second pad. A thickness of an intermetallic compound layer formed by the first wire and the first pad is larger than a thickness of an intermetallic compound layer formed by the second wire and the second pad.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: June 19, 2018
    Assignee: DENSO CORPORATION
    Inventors: Shotaro Miyawaki, Naohiko Hirano, Akiyoshi Asai, Yasutomi Asai
  • Publication number: 20170256510
    Abstract: Electrode pads disposed on a first surface of a semiconductor element include a first pad located close to a corner and a second pad located apart from the corner compared with the first pad. A first wire connected to the first pad has a smaller Young's modulus than a second wire connected to the second pad. A thickness of an intermetallic compound layer formed by the first wire and the first pad is larger than a thickness of an intermetallic compound layer formed by the second wire and the second pad.
    Type: Application
    Filed: July 31, 2015
    Publication date: September 7, 2017
    Inventors: Shotaro MIYAWAKI, Naohiko HIRANO, Akiyoshi ASAI, Yasutomi ASAI
  • Patent number: 9269576
    Abstract: A silicon carbide semiconductor substrate is made of a silicon carbide single crystal and is formed with a stamp on at least a surface as an identification indication formed of a crystal defect. When a silicon carbide single crystal is allowed to grow using the silicon carbide semiconductor substrate as a seed crystal, the stamp can be propagated to the silicon carbide single crystal as a crystal defect. When silicon carbide semiconductor substrates are manufactured using the silicon carbide single crystal, the stamp has already been formed on each of the silicon carbide semiconductor substrates.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: February 23, 2016
    Assignee: DENSO CORPORATION
    Inventors: Shouichi Yamauchi, Naohiko Hirano
  • Publication number: 20150228482
    Abstract: A silicon carbide semiconductor substrate is made of a silicon carbide single crystal and is formed with a stamp on at least a surface as an identification indication formed of a crystal defect. When a silicon carbide single crystal is allowed to grow using the silicon carbide semiconductor substrate as a seed crystal, the stamp can be propagated to the silicon carbide single crystal as a crystal defect. When silicon carbide semiconductor substrates are manufactured using the silicon carbide single crystal, the stamp has already been formed on each of the silicon carbide semiconductor substrates.
    Type: Application
    Filed: September 12, 2013
    Publication date: August 13, 2015
    Inventors: Shouichi Yamauchi, Naohiko Hirano
  • Publication number: 20110068149
    Abstract: A mixed mother alloy is prepared from a solder mixture comprising a pyrolyzable flux and high melting point metal particles, the mixed mother alloy is charged into a large amount of molten solder and stirred, and a billet is prepared. The billet can then be extruded, rolled, and punched to form a pellet or a washer, for example.
    Type: Application
    Filed: September 14, 2010
    Publication date: March 24, 2011
    Inventors: Naohiko Hirano, Akira Tanahashi, Yoshitsugu Sakamoto, Kaichi Tsuruta, Takashi Ishii, Satoshi Soga
  • Patent number: 7800230
    Abstract: A solder preform according to the present invention has a variation in the size of high melting point metal particles which is at most 20 micrometers when the metal particle diameter is 50 micrometers, and an alloy layer of the high melting point metal particles and the main component of solder is formed around the high melting point metal particles. In addition, no voids at all are present in the solder. An electronic component according to the present invention has a semiconductor element bonded to a substrate with the above-described solder preform and has excellent resistance to heat cycles.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: September 21, 2010
    Assignees: DENSO CORPORATION, Senju Metal Industry Co., Ltd.
    Inventors: Naohiko Hirano, Yoshitsugu Sakamoto, Tomomi Okumura, Kaichi Tsuruta, Minoru Ueshima, Takashi Ishii
  • Patent number: 7793820
    Abstract: A mixed mother alloy is prepared from a solder mixture comprising a pyrolyzable flux and high melting point metal particles, the mixed mother alloy is charged into a large amount of molten solder and stirred, and a billet is prepared. The billet can then be extruded, rolled, and punched to form a pellet or a washer, for example.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: September 14, 2010
    Assignees: Senju Metal Industry Co., Ltd., Denso Corporation
    Inventors: Naohiko Hirano, Akira Tanahashi, Yoshitsugu Sakamoto, Kaichi Tsuruta, Takashi Ishii, Satoshi Soga
  • Publication number: 20090236725
    Abstract: An electronic component having a semiconductor element bonded to a substrate with solder has a decreased bonding strength if there is not a suitable clearance between the semiconductor element and the substrate. Therefore, a solder preform having high melting point metal particles dispersed in solder has been used in the manufacture of electronic components. However, when an electronic component was manufactured using a conventional solder preform, there were cases in which the semiconductor element leaned or the bonding strength was not adequate. A solder preform according to the present invention has a variation in the size of high melting point metal particles which is at most 20 micrometers when the metal particle diameter is 50 micrometers, and an alloy layer of the high melting point metal particles and the main component of solder is formed around the high melting point metal particles. In addition, no voids at all are present in the solder.
    Type: Application
    Filed: April 26, 2007
    Publication date: September 24, 2009
    Inventors: Naohiko Hirano, Yoshitsugu Sakamoto, Tomomi Okumura, Kaichi Tsuruta, Minoru Ueshima, Takashi Ishii
  • Patent number: 7468318
    Abstract: A method for manufacturing a mold type semiconductor device is provided. The device includes a semiconductor chip having a semiconductor part and a metallic member connecting to the chip via a conductive layer and a connecting member. The method includes: forming the semiconductor part on a semiconductor substrate so that a cell portion is provided; forming the conductive layer on the substrate; forming a first resist layer to cover a part of the conductive layer corresponding to the cell portion; etching the conductive layer with the first resist layer as a mask so that a first conductive layer is provided; removing the first resist layer and forming a second conductive layer to cover a surface and an edge of the first conductive layer. The second conductive layer has a Young's modulus equal to or larger than the semiconductor substrate.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: December 23, 2008
    Assignee: DENSO CORPORATION
    Inventors: Naohiko Hirano, Nobuyuki Kato, Takanori Teshima, Yoshitsugu Sakamoto, Shoji Miura, Akihiro Niimi
  • Publication number: 20080237301
    Abstract: A mixed mother alloy is prepared from a solder mixture comprising a pyrolyzable flux and high melting point metal particles, the mixed mother alloy is charged into a large amount of molten solder and stirred, and a billet is prepared. The billet can then be extruded, rolled, and punched to form a pellet or a washer, for example.
    Type: Application
    Filed: March 7, 2008
    Publication date: October 2, 2008
    Inventors: Naohiko Hirano, Akira Tanahashi, Yoshitsugu Sakamoto, Kaichi Tsuruta, Takashi Ishii, Satoshi Soga
  • Patent number: 7345369
    Abstract: A semiconductor device includes: a base member; a solder layer; and a semiconductor chip disposed on the base member through the solder layer. The chip has an in-plane temperature distribution when the chip is operated. The chip has an allowable maximum temperature as a temperature limit of operation. The in-plane temperature distribution of the chip provides a temperature of the chip at each position of a surface of the chip. The temperature margin at each position is obtained by subtracting the temperature of the chip from the allowable maximum temperature. The solder layer has an allowable maximum diameter of a void at each position, the void being disposed in the solder layer. The allowable maximum diameter of the void at each position becomes larger as the temperature margin at the position becomes larger.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: March 18, 2008
    Assignees: DENSO CORPORATION, Nippon Soken, Inc
    Inventors: Naoki Hirasawa, Sadahisa Onimaru, Hirohito Matsui, Kuniaki Mamitsu, Naohiko Hirano
  • Publication number: 20070158850
    Abstract: A mold type semiconductor device includes a semiconductor chip including a semiconductor part; a metallic layer; a solder layer; and a metallic member connecting to the semiconductor chip through the metallic layer and the solder layer. The solder layer is made of solder having yield stress smaller than that of the metallic layer. Even when the semiconductor chip is sealed with a resin mold, the metallic layer is prevented from cracking.
    Type: Application
    Filed: February 6, 2007
    Publication date: July 12, 2007
    Applicant: DENSO CORPORATION
    Inventors: Naohiko Hirano, Nobuyuki Kato, Takanori Teshima, Yoshitsugu Sakamoto, Shoji Miura, Akihiro Niimi
  • Patent number: 7239016
    Abstract: A semiconductor device includes a heat generation element; a bonding member; first and second heat radiation plates disposed on first and second sides of the heat generation element through the bonding member; a heat radiation block disposed between the first heat radiation plate and the heat generation element through the bonding member; and a resin mold. The heat radiation block has a thickness in a range between 0.5 mm and 1.5 mm. The semiconductor device has high reliability of the bonding member.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: July 3, 2007
    Assignee: Denso Corporation
    Inventors: Naohiko Hirano, Nobuyuki Kato, Kuniaki Mamitsu, Yoshimi Nakase
  • Patent number: 7235876
    Abstract: A semiconductor device includes: first and second metallic plates, each of which includes a heat radiation surface and an inner surface; a semiconductor element between the metallic plates; a block between the second metallic plate and the semiconductor element; a solder member between the second metallic plate and the block; and a resin mold. The heat radiation surface is exposed from the resin mold. The second metallic plate includes a groove for preventing the solder member from expanding outside of the block. The groove is disposed on the inner surface and disposed on an outer periphery of the block. The second metallic plate further includes an inner surface member on an inner surface of the groove. The inner surface member has a solder wettability, which is larger than a solder wettability of the block.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: June 26, 2007
    Assignee: Denso Corporation
    Inventors: Tomomi Okumura, Yoshitsugu Sakamoto, Naohiko Hirano, Kuniaki Mamitsu
  • Patent number: 7193326
    Abstract: A mold type semiconductor device includes a semiconductor chip including a semiconductor part; a metallic layer; a solder layer; and a metallic member connecting to the semiconductor chip through the metallic layer and the solder layer. The solder layer is made of solder having yield stress smaller than that of the metallic layer. Even when the semiconductor chip is sealed with a resin mold, the metallic layer is prevented from cracking.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: March 20, 2007
    Assignee: DENSO Corporation
    Inventors: Naohiko Hirano, Nobuyuki Kato, Takanori Teshima, Yoshitsugu Sakamoto, Shoji Miura, Akihiro Niimi
  • Publication number: 20070057373
    Abstract: A semiconductor device includes: first and second metallic plates, each of which includes a heat radiation surface and an inner surface; a semiconductor element between the metallic plates; a block between the second metallic plate and the semiconductor element; a solder member between the second metallic plate and the block; and a resin mold. The heat radiation surface is exposed from the resin mold. The second metallic plate includes a groove for preventing the solder member from expanding outside of the block. The groove is disposed on the inner surface and disposed on an outer periphery of the block. The second metallic plate further includes an inner surface member on an inner surface of the groove. The inner surface member has a solder wettability, which is larger than a solder wettability of the block.
    Type: Application
    Filed: September 7, 2006
    Publication date: March 15, 2007
    Applicant: DENSO CORPORATION
    Inventors: Tomomi Okumura, Yoshitsugu Sakamoto, Naohiko Hirano, Kuniaki Mamitsu
  • Patent number: 7145254
    Abstract: A semiconductor device includes a semiconductor chip that generates heat in operation, a pair of heat sinks for cooling the chip, and a mold resin, in which the chip and the heat sinks are embedded. The thickness t1 of the chip and the thickness t2 of one of heat sinks that is joined to the chip using a solder satisfy the equation of t2/t1?5. Furthermore, the thermal expansion coefficient ?1 of the heat sinks and the thermal expansion coefficient ?2 of the mold resin satisfy the equation of 0.5??2/?1?1.5. In addition, the surface of the chip that faces the solder has a roughness Ra that satisfies the equation of Ra?500 nm. Moreover, the solder is a Sn-based solder to suppress relaxation of a compressive stress in the chip, which is caused by the creeping of the solder.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: December 5, 2006
    Assignee: Denso Corporation
    Inventors: Naohiko Hirano, Takanori Teshima, Yoshimi Nakase, Kenji Yagi, Yasushi Ookura, Kuniaki Mamitsu, Kazuhito Nomura, Yutaka Fukuda
  • Publication number: 20060087043
    Abstract: A semiconductor device includes: a base member; a solder layer; and a semiconductor chip disposed on the base member through the solder layer. The chip has an in-plane temperature distribution when the chip is operated. The chip has an allowable maximum temperature as a temperature limit of operation. The in-plane temperature distribution of the chip provides a temperature of the chip at each position of a surface of the chip. The temperature margin at each position is obtained by subtracting the temperature of the chip from the allowable maximum temperature. The solder layer has an allowable maximum diameter of a void at each position, the void being disposed in the solder layer. The allowable maximum diameter of the void at each position becomes larger as the temperature margin at the position becomes larger.
    Type: Application
    Filed: October 13, 2005
    Publication date: April 27, 2006
    Applicants: DENSO CORPORATION, NIPPON SOKEN, INC.
    Inventors: Naoki Hirasawa, Sadahisa Onimaru, Hirohito Matsui, Kuniaki Mamitsu, Naohiko Hirano
  • Patent number: 7019395
    Abstract: A semiconductor module includes a fixed type and transformable type coolers and a flat semiconductor package sandwiched between the coolers. A relative positional relationship of the semiconductor package is fixed with the fixed type cooler, but variable with the transformable type cooler. The transformable type cooler includes a transformable member of a metal thin plate covering a coolant chamber. The semiconductor module includes a sandwiching mechanism causing the fixed type cooler to be pressed toward the transformable type cooler. Fastening adjustment screws of the sandwiching mechanism causes a pressing frame to approach a cooler body of the transformable type cooler. Therefore, the semiconductor package is pressed via the fixed type cooler while the transformable member is slightly transformed. This enhances a degree of contact between the semiconductor package and transformable member via an insulating member.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: March 28, 2006
    Assignee: Denso Corporation
    Inventors: Naohiko Hirano, Takanori Teshima