Patents by Inventor Naohiko Kawase

Naohiko Kawase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060263069
    Abstract: One macroblock is constructed by 16×16 pixels (bytes). When the macroblocks are stored in a frame memory constructed by a DRAM or the like, addresses are sequentially allocated in an ascending order in a manner such that addresses 0000 to 0255 are allocated to the first macroblock and addresses 0256 to 0512 are allocated to the second macroblock and the macroblocks are stored. The macroblocks stored in this manner are read out in the ascending order of the addresses.
    Type: Application
    Filed: July 27, 2006
    Publication date: November 23, 2006
    Applicant: Sony Corporation
    Inventors: Ikuo Tsukagoshi, Naohiko Kawase, Kikuo Yamamoto
  • Patent number: 7110663
    Abstract: One macroblock is constructed by 16×16 pixels (bytes). When the macroblocks are stored in a frame memory constructed by a DRAM or the like, addresses are sequentially allocated in an ascending order in a manner such that addresses 0000 to 0255 are allocated to the first macroblock and addresses 0256 to 0512 are allocated to the second macroblock and the macroblocks are stored. The macroblocks stored in this manner are read out in the ascending order of the addresses.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: September 19, 2006
    Assignee: Sony Corporation
    Inventors: Ikuo Tsukagoshi, Naohiko Kawase, Kikuo Yamamoto