Patents by Inventor Naohiro Koshisaka

Naohiro Koshisaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11791934
    Abstract: Provided is a communication device, including: a transmission and reception unit that transmits and receives a signal with an other communication device; an error detection unit that detects an occurrence of an error by having the transmission and reception unit receive a preamble specifying a type of data to be transmitted next, and comparing a bit sequence of a signal received following the preamble to a bit sequence that should be transmitted for the type specified for transmission by the preamble; and a conflict avoidance unit that, if the occurrence of an error is detected by the error detection unit, instructs the transmission and reception unit to transmit a clock corresponding to a certain number of bits following the preamble, and then transmit an abort signal giving an instruction to terminate communication partway through.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: October 17, 2023
    Assignee: Sony Group Corporation
    Inventors: Hiroo Takahashi, Takashi Yokokawa, Sonfun Lee, Naohiro Koshisaka
  • Patent number: 11714778
    Abstract: The present disclosure relates to a communication apparatus, a communication method, a program, and a communication system that enable more reliable communication. An I3C master receives a max read length and a max write length from an I3C slave. Then, when transmitting/receiving data to/from the I3C slave, the I3C master controls transmission/reception of the data so that the data to be transferred in one data transfer has a data length equal to or shorter than the max read length and the max write length, and transmits transfer length information indicating the data length of the data to be transferred, prior to data transfer of the data. The present technology is applicable to a bus IF, for example.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: August 1, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hiroo Takahashi, Naohiro Koshisaka
  • Patent number: 11561922
    Abstract: Communication is performed more reliably. A CCI (I3C DDR) processing section determines status of an index when requested to be accessed by an I3C master for a read operation. An error handling section then controls an I3C slave 13 to detect occurrence of an error based on the status of the index and to neglect all communication until DDR mode is stopped or restarted by the I3C master, the I3C slave 13 being further controlled to send a NACK response when performing acknowledge processing on a signal sent from the I3C master. This technology can be applied to the I3C bus, for example.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: January 24, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hiroo Takahashi, Naohiro Koshisaka
  • Patent number: 11544132
    Abstract: A CCI (I3C SDR) processing section determines status of an index when requested to be accessed by an I3C master for a read operation. An error handling section then controls an I3C slave 13 to detect occurrence of an error based on the status of the index and to neglect all communication until communication is restarted or stopped by the I3C master, the I3C slave 13 being further controlled to send a NACK response when performing acknowledge processing on a signal sent from the I3C master. This technology can be applied to the I3C bus, for example.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: January 3, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hiroo Takahashi, Naohiro Koshisaka
  • Patent number: 11442887
    Abstract: To perform communication more definitely and efficiently. In order to perform communication in which a group address is used setting a plurality of arbitrary slaves to a single group and setting the group to a destination, a slave having a group-belonging capability capable of belonging to the group and performing communication is recognized. Then, in a state in which a slave having the group-belonging capability and a slave having no group-belonging capability mixedly join in a bus, the group address is assigned to the slave recognized to have the group-belonging capability. The present technology is, for example, applicable to a bus IF.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: September 13, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Naohiro Koshisaka, Hiroo Takahashi
  • Publication number: 20220058156
    Abstract: The present disclosure relates to a communication apparatus, a communication method, a program, and a communication system that enable more reliable communication. An I3C master receives a max read length and a max write length from an I3C slave. Then, when transmitting/receiving data to/from the I3C slave, the I3C master controls transmission/reception of the data so that the data to be transferred in one data transfer has a data length equal to or shorter than the max read length and the max write length, and transmits transfer length information indicating the data length of the data to be transferred, prior to data transfer of the data. The present technology is applicable to a bus IF, for example.
    Type: Application
    Filed: May 6, 2021
    Publication date: February 24, 2022
    Inventors: Hiroo Takahashi, Naohiro Koshisaka
  • Publication number: 20220060282
    Abstract: The present disclosure relates to a communication apparatus and a communication method, and a program which make it possible to achieve higher reliability. When a packet is distributed to a plurality of lanes and transmitted, at least one of a packet header or a packet footer of the packet is transmitted independently in each of the lanes. The packet footer transmitted in each of the lanes is CRC calculated from a payload of the packet distributed to each of the lanes corresponding thereto, and the packet header transmitted in each of the lanes includes word count indicating the number of bytes of a payload of the packet distributed to each of the lanes corresponding thereto. The present technology can be applied to, for example, a communication system used for connecting an on-board camera.
    Type: Application
    Filed: January 31, 2020
    Publication date: February 24, 2022
    Inventors: Hiroo Takahashi, Toshihisa Hyakudai, Naohiro Koshisaka
  • Patent number: 11169944
    Abstract: To perform communication more definitely and efficiently. Communication is performed by a master that is a communication device having a communication initiative and a slave that is a communication device that performs communication under control of the master. The master assigns a group address to an arbitrary slave of a plurality of slaves joining in a bus setting a plurality of arbitrary slaves to one group and setting the group to a destination, and when it is confirmed that at least one or more slaves exit from the bus of the slaves to which the group address is assigned, the group address assigned to the remaining slaves is reset. The present technology is, for example, applicable to a bus IF.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: November 9, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hiroo Takahashi, Naohiro Koshisaka
  • Publication number: 20210306445
    Abstract: A communication apparatus, method and program that accommodate diverse usage are disclosed. In one example, a packet header is generated according to a CSI-2 standard. The packet header includes setting information of conditions set for data to be transmitted in a packet is placed. An extended header is also generated, into which the setting information is to be placed separately from the packet header. Then, into an unused region defined as a region that is not used in the existing CSI-2 standard with respect to a data type that is the setting information indicative of a type of the data to be transmitted in the packet, extension mode setting information indicative of whether or not an extension mode using the extended header is used is placed. The disclosed technology can be applied, for example, in a mobile device or in an in-vehicle camera.
    Type: Application
    Filed: December 6, 2019
    Publication date: September 30, 2021
    Inventors: Hiroo Takahashi, Toshihisa Hyakudai, Naohiro Koshisaka
  • Patent number: 11119955
    Abstract: To perform communication more definitely and efficiently. In a case of transferring a communication initiative in accordance with a request by a secondary master, a master determines whether or not the secondary master that has performed the request has a group management capability. Then, when it is determined that the secondary master has no group management capability, the master instructs all communication devices connected to a bus to reset a group address, and when it is determined that the secondary master has the group management capability, the master transfers the communication initiative in a state in which the group address is set. The present technology is, for example, applicable to a bus IF.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: September 14, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Naohiro Koshisaka, Hiroo Takahashi
  • Patent number: 11010328
    Abstract: The present disclosure relates to a communication apparatus, a communication method, a program, and a communication system that enable more reliable communication. An I3C master receives a max read length and a max write length from an I3C slave. Then, when transmitting/receiving data to/from the I3C slave, the I3C master controls transmission/reception of the data so that the data to be transferred in one data transfer has a data length equal to or shorter than the max read length and the max write length, and transmits transfer length information indicating the data length of the data to be transferred, prior to data transfer of the data. The present technology is applicable to a bus IF, for example.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: May 18, 2021
    Assignee: Sony Semiconductors Solutions Corporation
    Inventors: Hiroo Takahashi, Naohiro Koshisaka
  • Patent number: 10944536
    Abstract: A transmission device of the disclosure includes: a clock signal transmitting circuit that outputs a clock signal onto a clock signal line; a data signal transmitting circuit that outputs a data signal onto a data signal line; and a blanking controller that controls the clock signal transmitting circuit to output a predetermined blanking signal, in place of the clock signal, from the clock signal transmitting circuit to the clock signal line in synchronization with a blanking period of the data signal.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: March 9, 2021
    Assignee: Sony Corporation
    Inventors: Hiroo Takahashi, Hideyuki Matsumoto, Hiroaki Hayashi, Naohiro Koshisaka
  • Patent number: 10942885
    Abstract: This disclosure relates to a communicating apparatus, a communication method, a program, and a communication system that each enable execution of more reliable communication. A communicating apparatus includes a transmitting and receiving part that executes transmission and reception of signals with at least one or more other communicating apparatuses through a data signal line and a clock signal line, and an error avoiding part that, in a state where a communication system configured to be able to execute communication through a bus already operates, executes a process of avoiding occurrence of any error occurring when a communicating apparatus is additionally connected to the communication system. This technique is applicable to, for example, a bus IF.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: March 9, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hiroo Takahashi, Takashi Yokokawa, Toshihisa Hyakudai, Naohiro Koshisaka
  • Patent number: 10892852
    Abstract: A master includes a transmission and receiving unit that transmits and receives signals to and from a slave, and the transmission and receiving unit receives read data read out from the slave, and typically drives the second bit of a preamble transmitted/received subsequent to the read data. The master can notify the slave that communication is or is not interrupted at some midpoint, on the basis of the second bit of the preamble. The present technology can be applied to a bus IF that communicates pursuant to, for example, the specification of I3C.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: January 12, 2021
    Assignee: Sony Corporation
    Inventors: Hiroo Takahashi, Takashi Yokokawa, Sonfun Lee, Naohiro Koshisaka
  • Patent number: 10824582
    Abstract: There is provided a communication apparatus, including: a transmission/reception unit that transmits/receives a signal to/from a different communication apparatus; and a recovery signal transmission instruction unit that instructs the transmission/reception unit to transmit a recovery signal for recovering communication with the different communication apparatus that is out of working order, the recovery signal including at least a first command, the first command prescribing that no processing is to be executed in the different communication apparatus that is in working order.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: November 3, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hiroo Takahashi, Sonfun Lee, Naohiro Koshisaka
  • Publication number: 20200272532
    Abstract: A CCI (I3C SDR) processing section determines status of an index when requested to be accessed by an I3C master for a read operation. An error handling section then controls an I3C slave 13 to detect occurrence of an error based on the status of the index and to neglect all communication until communication is restarted or stopped by the I3C master, the I3C slave 13 being further controlled to send a NACK response when performing acknowledge processing on a signal sent from the I3C master. This technology can be applied to the I3C bus, for example.
    Type: Application
    Filed: July 20, 2018
    Publication date: August 27, 2020
    Inventors: Hiroo Takahashi, Naohiro Koshisaka
  • Patent number: 10740268
    Abstract: Communication systems and communication control methods are disclosed. In one example, a slave device belonging to a group of devices to which arbitration is applicable sequentially transmits a start bit and a first address including a first bit having a value different from a corresponding first bit of predetermined pattern data. A master device sequentially transmits the start bit and the predetermined pattern data. The master device arbitrates the master device and the first slave device based on the value of the first bit.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: August 11, 2020
    Assignee: Sony Corporation
    Inventors: Hiroo Takahashi, Naohiro Koshisaka, Sonfun Lee
  • Patent number: 10739812
    Abstract: A communication system according to an embodiment of the disclosure includes a transmission device and a reception device. The transmission device outputs a clock signal with a clock frequency corresponding to a transmission mode, and outputs a data signal corresponding to the transmission mode. The reception device receives the clock signal and the data signal, and determines the transmission mode on a basis of magnitude of the clock frequency of the received clock signal.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: August 11, 2020
    Assignee: Sony Corporation
    Inventors: Naohiro Koshisaka, Hiroo Takahashi
  • Patent number: 10740172
    Abstract: There is provided a communication apparatus, including: a transmission/reception unit that transmits/receives a signal to/from a different apparatus; a confirmation signal detection unit that detects one of a reception confirmation signal and a non-reception confirmation signal, the reception confirmation signal and the non-reception confirmation signal being transmitted from the different apparatus that has received the signal transmitted from the transmission/reception unit; and a conflict avoiding unit that instructs the transmission/reception unit to transmit an abort signal for instructing to interrupt communication after ignoring a predetermined number of bits following the non-reception confirmation signal when the confirmation signal detection unit has detected the non-reception confirmation signal.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: August 11, 2020
    Assignee: Sony Corporation
    Inventors: Hiroo Takahashi, Takashi Yokokawa, Sonfun Lee, Naohiro Koshisaka
  • Publication number: 20200250128
    Abstract: Communication is performed more reliably. A CCI (I3C DDR) processing section determines status of an index when requested to be accessed by an I3C master for a read operation. An error handling section then controls an I3C slave 13 to detect occurrence of an error based on the status of the index and to neglect all communication until DDR mode is stopped or restarted by the I3C master, the I3C slave 13 being further controlled to send a NACK response when performing acknowledge processing on a signal sent from the I3C master. This technology can be applied to the I3C bus, for example.
    Type: Application
    Filed: July 20, 2018
    Publication date: August 6, 2020
    Inventors: Hiroo Takahashi, Naohiro Koshisaka