Patents by Inventor Naohiro Nomura

Naohiro Nomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8294871
    Abstract: A liquid crystal cell manufacturing method includes preparing a pair of glass substrates each including an area configured to form a plurality of finished liquid crystal display apparatuses thereon, while a plurality of seal members and a plurality of pillars each including ends that respectively abut against the pair of glass substrates are interposed between the pair of glass substrates, adhering the pair of glass substrates to form a liquid crystal display apparatus forming assembly, and while the liquid crystal display apparatus forming assembly is formed, forming a plurality of scribe lines that intersect each other on surfaces of the pair of glass substrates that are opposite to surfaces of the pair of glass substrates that oppose each other. At least a part of each of the pillars is arranged to overlap at least one of regions, between the pair of glass substrates, corresponding to the plurality of scribe lines.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: October 23, 2012
    Assignee: Casio Computer Co., Ltd.
    Inventors: Naohiro Nomura, Kunihiko Kasuya
  • Publication number: 20100225874
    Abstract: A liquid crystal cell manufacturing method includes preparing a pair of glass substrates each including an area configured to form a plurality of finished liquid crystal display apparatuses thereon, while a plurality of seal members and a plurality of pillars each including ends that respectively abut against the pair of glass substrates are interposed between the pair of glass substrates, adhering the pair of glass substrates to form a liquid crystal display apparatus forming assembly, and while the liquid crystal display apparatus forming assembly is formed, forming a plurality of scribe lines that intersect each other on surfaces of the pair of glass substrates that are opposite to surfaces of the pair of glass substrates that oppose each other. At least a part of each of the pillars is arranged to overlap at least one of regions, between the pair of glass substrates, corresponding to the plurality of scribe lines.
    Type: Application
    Filed: May 19, 2010
    Publication date: September 9, 2010
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Naohiro NOMURA, Kunihiko Kasuya, Masao Yoshino, Shinji Danjo, Makoto Iwasaki, Toshiharu Nishino
  • Patent number: 7768623
    Abstract: A liquid crystal cell manufacturing method includes preparing a pair of glass substrates each including an area configured to form a plurality of finished liquid crystal display apparatuses thereon, while a plurality of seal members and a plurality of pillars each including ends that respectively abut against the pair of glass substrates are interposed between the pair of glass substrates, adhering the pair of glass substrates to form a liquid crystal display apparatus forming assembly, and while the liquid crystal display apparatus forming assembly is formed, forming a plurality of scribe lines that intersect each other on surfaces of the pair of glass substrates that are opposite to surfaces of the pair of glass substrates that oppose each other. At least a part of each of the pillars is arranged to overlap at least one of regions, between the pair of glass substrates, corresponding to the plurality of scribe lines.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: August 3, 2010
    Assignee: Casio Computer Co., Ltd.
    Inventors: Naohiro Nomura, Kunihiko Kasuya, Masao Yoshino, Shinji Danjo, Makoto Iwasaki, Toshiharu Nishino
  • Patent number: 7692492
    Abstract: An operational amplifier includes a differential amplifier circuit provided at an input stage and an amplifier circuit at a post stage. In the differential amplifier circuit, first and third bipolar transistors are PNP-type bipolar transistors and Darlington-connected. An inverting input terminal is connected to the base terminal of the first bipolar transistor. The first and third bipolar transistors and second and fourth bipolar transistors construct an input differential pair. First and second protection diodes are connected between the base terminals of the first and second bipolar transistors constructing the input differential pair and the ground potential, respectively. Each of the protection diodes is connected so that the cathode terminal is positioned on the base terminal side of the bipolar transistor, and the cathode terminal is positioned on the ground potential side.
    Type: Grant
    Filed: April 1, 2009
    Date of Patent: April 6, 2010
    Assignee: Rohm Co., Ltd.
    Inventors: Kouichi Hanada, Masanori Kayama, Naohiro Nomura, Akira Noguchi
  • Publication number: 20090189693
    Abstract: An operational amplifier includes a differential amplifier circuit provided at an input stage and an amplifier circuit at a post stage. In the differential amplifier circuit, first and third bipolar transistors are PNP-type bipolar transistors and Darlington-connected. An inverting input terminal is connected to the base terminal of the first bipolar transistor. The first and third bipolar transistors and second and fourth bipolar transistors construct an input differential pair. First and second protection diodes are connected between the base terminals of the first and second bipolar transistors constructing the input differential pair and the ground potential, respectively. Each of the protection diodes is connected so that the cathode terminal is positioned on the base terminal side of the bipolar transistor, and the cathode terminal is positioned on the ground potential side.
    Type: Application
    Filed: April 1, 2009
    Publication date: July 30, 2009
    Applicant: ROHM CO., LTD.
    Inventors: Kouichi Hanada, Masanori Kayama, Naohiro Nomura, Akira Noguchi
  • Patent number: 7532076
    Abstract: An operational amplifier includes a differential amplifier circuit provided at an input stage and an amplifier circuit at a post stage. In the differential amplifier circuit, first and third bipolar transistors are PNP-type bipolar transistors and Darlington-connected. An inverting input terminal is connected to the base terminal of the first bipolar transistor. The first and third bipolar transistors and second and fourth bipolar transistors construct an input differential pair. First and second protection diodes are connected between the base terminals of the first and second bipolar transistors constructing the input differential pair and the ground potential, respectively. Each of the protection diodes is connected so that the cathode terminal is positioned on the base terminal side of the bipolar transistor, and the cathode terminal is positioned on the ground potential side.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: May 12, 2009
    Assignee: Rohm Co., Ltd.
    Inventors: Kouichi Hanada, Masanori Kayama, Naohiro Nomura, Akira Noguchi
  • Publication number: 20080024699
    Abstract: A liquid crystal cell manufacturing method includes preparing a pair of glass substrates each including an area configured to form a plurality of finished liquid crystal display apparatuses thereon, while a plurality of seal members and a plurality of pillars each including ends that respectively abut against the pair of glass substrates are interposed between the pair of glass substrates, adhering the pair of glass substrates to form a liquid crystal display apparatus forming assembly, and while the liquid crystal display apparatus forming assembly is formed, forming a plurality of scribe lines that intersect each other on surfaces of the pair of glass substrates that are opposite to surfaces of the pair of glass substrates that oppose each other. At least a part of each of the pillars is arranged to overlap at least one of regions, between the pair of glass substrates, corresponding to the plurality of scribe lines.
    Type: Application
    Filed: July 16, 2007
    Publication date: January 31, 2008
    Applicant: Casio Computer Co., Ltd.
    Inventors: Naohiro Nomura, Kunihiko Kasuya, Masao Yoshino, Shinji Danjo, Makoto Iwasaki, Toshiharu Nishino
  • Publication number: 20080012641
    Abstract: An operational amplifier includes a differential amplifier circuit provided at an input stage and an amplifier circuit at a post stage. In the differential amplifier circuit, first and third bipolar transistors are PNP-type bipolar transistors and Darlington-connected. An inverting input terminal is connected to the base terminal of the first bipolar transistor. The first and third bipolar transistors and second and fourth bipolar transistors construct an input differential pair. First and second protection diodes are connected between the base terminals of the first and second bipolar transistors constructing the input differential pair and the ground potential, respectively. Each of the protection diodes is connected so that the cathode terminal is positioned on the base terminal side of the bipolar transistor, and the cathode terminal is positioned on the ground potential side.
    Type: Application
    Filed: September 29, 2005
    Publication date: January 17, 2008
    Inventors: Kouichi Hanada, Masanori Kayama, Naohiro Nomura, Akira Noguchi