Patents by Inventor Naohiro Shimada

Naohiro Shimada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7672237
    Abstract: In a node having first, second, and third layers, a packet (or a cell) is mapped in the first layer. The first layer judges whether the packet (or the cell) is to be dropped at the node or to be hopped to a next node. The first layer transmits the packet to the third layer through the second layer when the first layer judges that the packet is to be dropped at the node. The first layer transmits, when the first layer judges that the packet is to be hopped to the next node, the packet to the next node by making the packet cut through the first layer.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: March 2, 2010
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: 7664874
    Abstract: In a node having first, second, and third layers, a packet (or a cell) is mapped in the first layer. The first layer judges whether the packet (or the cell) is to be dropped at the node or to be hopped to a next node. The first layer transmits the packet to the third layer through the second layer when the first layer judges that the packet is to be dropped at the node. The first layer transmits, when the first layer judges that the packet is to be hopped to the next node, the packet to the next node by making the packet cut through the first layer.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: February 16, 2010
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Publication number: 20050249242
    Abstract: In a node having first, second, and third layers, a packet (or a cell) is mapped in the first layer. The first layer judges whether the packet (or the cell) is to be dropped at the node or to be hopped to a next node. The first layer transmits the packet to the third layer through the second layer when the first layer judges that the packet is to be dropped at the node. The first layer transmits, when the first layer judges that the packet is to be hopped to the next node, the packet to the next node by making the packet cut through the first layer.
    Type: Application
    Filed: July 15, 2005
    Publication date: November 10, 2005
    Inventor: Naohiro Shimada
  • Publication number: 20050249243
    Abstract: In a node having first, second, and third layers, a packet (or a cell) is mapped in the first layer. The first layer judges whether the packet (or the cell) is to be dropped at the node or to be hopped to a next node. The first layer transmits the packet to the third layer through the second layer when the first layer judges that the packet is to be dropped at the node. The first layer transmits, when the first layer judges that the packet is to be hopped to the next node, the packet to the next node by making the packet cut through the first layer.
    Type: Application
    Filed: July 15, 2005
    Publication date: November 10, 2005
    Inventor: Naohiro Shimada
  • Patent number: 6957271
    Abstract: In a node having first, second, and third layers, a packet (or a cell) is mapped in the first layer. The first layer judges whether the packet (or the cell) is to be dropped at the node or to be hopped to a next node. The first layer transmits the packet to the third layer through the second layer when the first layer judges that the packet is to be dropped at the node. The first layer transmits, when the first layer judges that the packet is to be hopped to the next node, the packet to the next node by making the packet cut through the first layer.
    Type: Grant
    Filed: February 17, 2000
    Date of Patent: October 18, 2005
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: 6804268
    Abstract: A multi-access transmission method for effectively and efficiently utilizing bands of a synchronous digital hierarchy (SDH) path. The method has the steps of extracting a synchronous digital hierarchy path from signals input from a first point, recognizing all packets or cells input from the first point to select and drop a packet or cell to be dropped at a second point, multiplexing packets or cells not dropped and a packet or cell to be inserted at the second point at a packet or cell level, and sending signals created at the multiplexing step to a third point. With this method, packets or cells are multiplexed in a synchronous digital hierarchy path to share one synchronous digital hierarchy path among a plurality of communications.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: October 12, 2004
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: 6690649
    Abstract: A QoS management apparatus in which the quality of the requested QoS for each path and different values of the state are managed. A QoS monitor, a registered QoS, and an operation determining function are provided for each path, and the QoS is precisely managed.
    Type: Grant
    Filed: May 20, 1999
    Date of Patent: February 10, 2004
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: 6647014
    Abstract: A single node is constituted by a core node that carries out overall management of the node and extended nodes that are connected by transmission lines to the core node. The core node comprises: an Operation Administration & Maintenance (OAM) function part for managing the extended nodes; N common function parts for receiving and outputting by way of transmission lines OAM signals generated by the OAM function part and main signals, and an aggregate-side interface. The extended nodes each comprise individual interfaces and a common function part for processing main signals and OAM signals that are communicated over the transmission lines. The core node and extended nodes are each arranged in appropriate locations and are each housed in individual cases.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: November 11, 2003
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: 6557112
    Abstract: A QOS protection system can switch a current system and a reserved system depending upon degradation of quality through monitoring of arriving condition of packet to perform transmission with guarantee of QOS. The QOS protection system in a redundant system includes detection means for monitoring the packet flow and detecting at least the quality of degradation of the packet flow and switching means for performing switching between the current system and the reserved system when the detection means detects degradation of quality.
    Type: Grant
    Filed: December 6, 1999
    Date of Patent: April 29, 2003
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: 6483809
    Abstract: In a node (14) which is for use in an ATM (asynchronous transfer mode) network and which is supplied with user cells, the node includes a failure detecting section (11) for detecting a failure which is occurred in the ATM network such that no user cell is supplied to the node. The node further includes a band detecting section (12) for detecting, as a detected band, a transmission path band used in transferring the user cells immediately before occurrence of the failure. Connected to the failure detecting section and the band detecting section, a producing section (13) produces, when the failure detecting means detects the failure, OAM (Operation: Administration and Maintenance) cells at a production rate increased within a range such that the detected band is not exceeded. The OAM cells are for use in transferring information indicative of occurrence of the failure.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: November 19, 2002
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Publication number: 20020021670
    Abstract: In a node (14) which is for use in an ATM (asynchronous transfer mode) network and which is supplied with user cells, the node includes a failure detecting section (11) for detecting a failure which is occurred in the ATM network such that no user cell is supplied to the node. The node further includes a band detecting section (12) for detecting, as a detected band, a transmission path band used in transferring the user cells immediately before occurrence of the failure. Connected to the failure detecting section and the band detecting section, a producing section (13) produces, when the failure detecting means detects the failure, OAM (Operation: Administration and Maintenance) cells at a production rate increased within a range such that the detected band is not exceeded. The OAM cells are for use in transferring information indicative of occurrence of the failure.
    Type: Application
    Filed: April 19, 2001
    Publication date: February 21, 2002
    Inventor: Naohiro Shimada
  • Patent number: 6292502
    Abstract: An InGaAlP active region 3, which substantially lattice-matches with a GaAs substrate 1, has a multiple quantum well structure (MQW) formed by quantum well layers 11 of InGaP. When the oscillating wavelength caused by the current injection is less than or equal to 670 nm, the thickness (Lz) of the InGaP quantum well layers 11 is set to be less than 8 nm to form a lattice mismatching so that the quantum well layers 11 have a greater lattice constant than that of the GaAs substrate 1, and a compressive strain is added to the quantum well layers 11. Thus, gain is increased by reducing the thickness of the quantum well layers 11 and adding the compressive strain thereto, so that it is possible to achieve the improvement of the temperature characteristics, such as a reduced threshold, an improved efficiency, and a reduced current during operation at a high temperature, in a laser having an oscillating wavelength of 650 nm.
    Type: Grant
    Filed: June 3, 1998
    Date of Patent: September 18, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Naohiro Shimada
  • Patent number: 6247051
    Abstract: In a node (14) which is for use in an ATM (asynchronous transfer mode) network and which is supplied with user cells, the node includes a failure detecting section (11) for detecting a failure which is occurred in the ATM network such that no user cell is supplied to the node. The node further includes a band detecting section (12) for detecting, as a detected band, a transmission path band used in transferring the user cells immediately before occurrence of the failure. Connected to the failure detecting section and the band detecting section, a producing section (13) produces, when the failure detecting means detects the failure, OAM (Operation: Administration and Maintenance) cells at a production rate increased within a range such that the detected band is not exceeded. The OAM cells are for use in transferring information indicative of occurrence of the failure.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: June 12, 2001
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: 6144642
    Abstract: Disclosed is a transfer device within a telecommunications network capable of transferring control information at high speed without reducing main signal through-put and also capable of greatly reducing the processing burden on the control center while avoiding high physical cost and power consumption. Trouble and control information in a communication signal are detected at an incoming section, notification thereof is sent to an outgoing section and the relevant control information is inserted into the communication signal at the outgoing section. Furthermore, notification destinations of trouble and control information are stored based on the switching mode of the communication signal and notifications of trouble and control information are sent directly to the destined outgoing section without being switched. Moreover, signals are sent by multi-master mode or by Ethernet 10 Base-2.
    Type: Grant
    Filed: August 13, 1997
    Date of Patent: November 7, 2000
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: 6101167
    Abstract: A path switching apparatus which performs high-speed switching for quick recovery of an entire network is provide. The apparatus in advance stores information on possibility that an error affects other paths and, upon detecting an error, investigates a possibility of the error affecting other paths with the use of the stored information, predicts further possible path error before it is actually detected, and based on predicted information, detection of error, switching judgment and/or switching are performed as necessary, thus recovering the entire network quickly.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: August 8, 2000
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: 5511077
    Abstract: In a frame transmission system for transmitting multi-frames of a DS3.C-bit parity frame system as prescribed in American National Standard and also in Proposed Contribution to CCITT (ITU-T), C1-bits assigned to the prior art DS3.C-bit parity frame, i.e., 3.times.3=9 C-bits (fixed bits) for the 2nd, 6th and 7th channels, are used as control bits of DS2 level signal for intrinsic purposes. These bits may be processed in their entirely in the same manner as with the prior art control bits.
    Type: Grant
    Filed: June 16, 1994
    Date of Patent: April 23, 1996
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: 5434858
    Abstract: In a terminating station for a synchronous multiplex transmission network in which a frame of i rows and j columns is transmitted, the j columns of the frame is divided into k+m columns, with the k columns carrying a transport overhead and the m columns carrying an information payload. The m columns are subdivided into k groups of n columns each, and each of the corresponding n columns of each group carries a virtual tributary traffic. In the terminating station, a virtual tributary path idle (VTPI) pulse sequence is generated and inserted into the k columns of each frame. A timeslot interchanger, which provides the usual timeslot interchange within the frame, copies the contents of the k columns of the frame into one or more of the n columns of the k groups, respectively, of the same frame.
    Type: Grant
    Filed: February 28, 1994
    Date of Patent: July 18, 1995
    Assignee: NEC Corporation
    Inventor: Naohiro Shimada
  • Patent number: D454966
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: March 26, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Seiji Iida, Naohiro Shimada, Kazuo Fukuoka, Koichi Genei, Satoshi Komoto
  • Patent number: D456534
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: April 30, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Seiji Iida, Naohiro Shimada, Kazuo Fukuoka, Koichi Genei, Satoshi Komoto
  • Patent number: D485376
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: January 13, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Seiji Iida, Naohiro Shimada, Kazuo Fukuoka, Koichi Genei, Satoshi Komoto