Patents by Inventor Naohiro Suzuki

Naohiro Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11062274
    Abstract: Various failure rates are supposed for each facility, and an optimal maintenance plan is made. A maintenance planning apparatus includes a failure rate model generation unit that generates a failure rate model on the basis of failure probability information which is set for an O&M asset by a user, a simulation execution unit that executes simulation regarding a failure which possibly occurs in the O&M asset in a plurality of different conditions on the basis of the generated failure rate model, a KPI computation unit that computes a KPI corresponding to each of the plurality of different conditions on the basis of results of the simulation, and an analysis unit that analyzes the plurality of different conditions and KPIs respectively corresponding to the plurality of different conditions, so as to determine an optimal condition corresponding to the best KPI.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: July 13, 2021
    Assignee: HITACHI, LTD.
    Inventors: Toshihiro Morisawa, Yasuharu Namba, Toshiyuki Ukai, Naohiro Suzuki
  • Publication number: 20190236556
    Abstract: Various failure rates are supposed for each facility, and an optimal maintenance plan is made. A maintenance planning apparatus includes a failure rate model generation unit that generates a failure rate model on the basis of failure probability information which is set for an O&M asset by a user, a simulation execution unit that executes simulation regarding a failure which possibly occurs in the O&M asset in a plurality of different conditions on the basis of the generated failure rate model, a KPI computation unit that computes a KPI corresponding to each of the plurality of different conditions on the basis of results of the simulation, and an analysis unit that analyzes the plurality of different conditions and KPIs respectively corresponding to the plurality of different conditions, so as to determine an optimal condition corresponding to the best KPI.
    Type: Application
    Filed: December 18, 2018
    Publication date: August 1, 2019
    Inventors: Toshihiro MORISAWA, Yasuharu NAMBA, Toshiyuki UKAI, Naohiro SUZUKI
  • Patent number: 9818860
    Abstract: An SiC semiconductor device has a p type region including a low concentration region and a high concentration region filled in a trench formed in a cell region. A p type column is provided by the low concentration region, and a p+ type deep layer is provided by the high concentration region. Thus, since a SJ structure can be made by the p type column and the n type column provided by the n type drift layer, an on-state resistance can be reduced. As a drain potential can be blocked by the p+ type deep layer, at turnoff, an electric field applied to the gate insulation film can be alleviated and thus breakage of the gate insulation film can be restricted. Therefore, the SiC semiconductor device can realize the reduction of the on-state resistance and the restriction of breakage of the gate insulation film.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: November 14, 2017
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yuichi Takeuchi, Naohiro Suzuki, Masahiro Sugimoto, Hidefumi Takaya, Akitaka Soeno, Jun Morimoto, Narumasa Soejima, Yukihiko Watanabe
  • Patent number: 9674058
    Abstract: A time series data processing device for processing time series data that is a sequence of data received from a system that is a processing target over time includes a time series data search processing unit that receives, for details of the time series data and occurrence time information, a time series data search condition including events of a plurality of the time series data and an interval condition that is a condition of time intervals of the events occurring, and changes the interval condition using an allowable time lag that is allowable time of a set time lag in a transmission source of the time series data to thereby reflect the set time lag in the time series data search condition; and a data monitoring unit that monitors the time series data received from the system that is the processing target, using the time series data search condition changed by the time series data search processing unit.
    Type: Grant
    Filed: November 7, 2011
    Date of Patent: June 6, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Keita Shimasaki, Miyako Shimasaki, Naohiro Suzuki, Shuntaro Hitomi
  • Patent number: 9647108
    Abstract: A silicon carbide semiconductor device includes: a substrate; a drift layer; a current dispersion layer; a base region; a source region; trenches; a gate insulation film; a gate electrode; a source electrode; a drain electrode; and a bottom layer. The current dispersion layer is arranged on the drift layer, and has a first conductive type with an impurity concentration higher than the drift layer. The bottom layer has a second conductive type, is arranged under the base region, covers a bottom of each trench including a corner portion of the bottom of the trench, and has a depth equal to or deeper than the current dispersion layer.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: May 9, 2017
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Naohiro Suzuki, Sachiko Aoi, Yukihiko Watanabe, Akitaka Soeno, Masaki Konishi
  • Patent number: 9608104
    Abstract: A silicon carbide semiconductor device includes: a vertical MOSFET having: a semiconductor substrate including a high-concentration impurity layer and a drift layer; a base region; a source region; a trench gate structure; a source electrode; and a drain electrode. The base region has a high-concentration base region and a low-concentration base region having a second conductivity type with an impurity concentration lower than the high-concentration base region, which are stacked each other. Each of the high-concentration base region and the low-concentration base region contacts a side surface of the trench.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: March 28, 2017
    Assignee: DENSO CORPORATION
    Inventors: Yuichi Takeuchi, Naohiro Suzuki, Jun Morimoto, Narumasa Soejima
  • Publication number: 20170084735
    Abstract: An SiC semiconductor device has a p type region including a low concentration region and a high concentration region filled in a trench formed in a cell region. A p type column is provided by the low concentration region, and a p+ type deep layer is provided by the high concentration region. Thus, since a SJ structure can be made by the p type column and the n type column provided by the n type drift layer, an on-state resistance can be reduced. As a drain potential can be blocked by the p+ type deep layer, at turnoff, an electric field applied to the gate insulation film can be alleviated and thus breakage of the gate insulation film can be restricted. Therefore, the SiC semiconductor device can realize the reduction of the on-state resistance and the restriction of breakage of the gate insulation film.
    Type: Application
    Filed: November 30, 2016
    Publication date: March 23, 2017
    Inventors: Yuichi TAKEUCHI, Naohiro SUZUKI, Masahiro SUGIMOTO, Hidefumi TAKAYA, Akitaka SOENO, Jun MORIMOTO, Narumasa SOEJIMA, Yukihiko WATANABE
  • Publication number: 20170040441
    Abstract: A resurf layer and a guard ring are formed in a peripheral region in a position at the surface of the semiconductor substrate. The guard ring is formed more deeply than the resurf layer. When the guard ring is shallow and the impurity concentration of the resurf layer is low, the potential distribution at the deep portion of the resurf layer becomes unstable, and the resurf layer does not sufficiently exhibit the effect of improving the withstand voltage. When the guard ring is deep, the impurity concentration of the guard ring is high, the potential distribution at the deep portion of the resurf layer is regulated by the guard ring and the resurf layer sufficiently exhibits the effect of improving the withstand voltage.
    Type: Application
    Filed: December 22, 2014
    Publication date: February 9, 2017
    Applicants: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO, TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Sachiko AOI, Yukihiko WATANABE, Katsumi SUZUKI, Naohiro SUZUKI
  • Patent number: 9543428
    Abstract: An SiC semiconductor device has a p type region including a low concentration region and a high concentration region filled in a trench formed in a cell region. A p type column is provided by the low concentration region, and a p+ type deep layer is provided by the high concentration region. Thus, since a SJ structure can be made by the p type column and the n type column provided by the n type drift layer, an on-state resistance can be reduced. As a drain potential can be blocked by the p+ type deep layer, at turnoff, an electric field applied to the gate insulation film can be alleviated and thus breakage of the gate insulation film can be restricted. Therefore, the SiC semiconductor device can realize the reduction of the on-state resistance and the restriction of breakage of the gate insulation film.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: January 10, 2017
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yuichi Takeuchi, Naohiro Suzuki, Masahiro Sugimoto, Hidefumi Takaya, Akitaka Soeno, Jun Morimoto, Narumasa Soejima, Yukihiko Watanabe
  • Publication number: 20160247910
    Abstract: A silicon carbide semiconductor device includes: a substrate; a drift layer; a current dispersion layer; a base region; a source region; trenches; a gate insulation film; a gate electrode; a source electrode; a drain electrode; and a bottom layer. The current dispersion layer is arranged on the drift layer, and has a first conductive type with an impurity concentration higher than the drift layer. The bottom layer has a second conductive type, is arranged under the base region, covers a bottom of each trench including a corner portion of the bottom of the trench, and has a depth equal to or deeper than the current dispersion layer.
    Type: Application
    Filed: September 15, 2014
    Publication date: August 25, 2016
    Applicants: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Naohiro SUZUKI, Sachiko AOI, Yukihiko WATANABE, Akitaka SOENO, Masaki KONISHI
  • Publication number: 20160104794
    Abstract: A silicon carbide semiconductor device includes: a vertical MOSFET having: a semiconductor substrate including a high-concentration impurity layer and a drift layer; a base region; a source region; a trench gate structure; a source electrode; and a drain electrode. The base region has a high-concentration base region and a low-concentration base region having a second conductivity type with an impurity concentration lower than the high-concentration base region, which are stacked each other. Each of the high-concentration base region and the low-concentration base region contacts a side surface of the trench.
    Type: Application
    Filed: May 28, 2014
    Publication date: April 14, 2016
    Inventors: Yuichi TAKEUCHI, Naohiro SUZUKI, Jun MORIMOTO, Narumasa SOEJIMA
  • Patent number: 9276075
    Abstract: A semiconductor device has a semiconductor substrate including a body region, a drift region, a trench that extends from a surface of the semiconductor substrate into the drift region through the body region, and a source region located adjacent to the trench in a range exposed to the surface of the semiconductor substrate, the source region being isolated from the drift region by the body region. A specific layer is disposed on a bottom of the trench, and it has a characteristic of forming a depletion layer at a junction between the specific layer and the drift region. An insulating layer covers an upper surface of the specific layer and a sidewall of the trench. A conductive portion is formed on a part of the side wall of the trench. The conductive portion is joined to the specific layer, and reaches the surface of the semiconductor substrate.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: March 1, 2016
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Hidefumi Takaya, Hideo Matsuki, Naohiro Suzuki, Tsuyoshi Ishikawa, Narumasa Soejima, Yukihiko Watanabe
  • Publication number: 20150234897
    Abstract: An unnecessary load is prevented from being applied to the system even in cases where the time series data required for the time series data analysis processing has not been collected. A time series data processing apparatus assigns an arrival time, which is a time that the time series data arrived, to the time series data sent from the data source, determines whether the requested time series data has arrived, and predicts the arrival time of the time series data, which was determined by the data arrival determination unit as not yet arrived, based on the arrival time assigned to each of the time series data.
    Type: Application
    Filed: January 10, 2013
    Publication date: August 20, 2015
    Applicant: Hitachi, Ltd.
    Inventors: Yasuo Kuninobu, Masashi Egi, Naohiro Suzuki
  • Publication number: 20150115286
    Abstract: An SiC semiconductor device has a p type region including a low concentration region and a high concentration region filled in a trench formed in a cell region. A p type column is provided by the low concentration region, and a p+ type deep layer is provided by the high concentration region. Thus, since a SJ structure can be made by the p type column and the n type column provided by the n type drift layer, an on-state resistance can be reduced. As a drain potential can be blocked by the p+ type deep layer, at turnoff, an electric field applied to the gate insulation film can be alleviated and thus breakage of the gate insulation film can be restricted. Therefore, the SiC semiconductor device can realize the reduction of the on-state resistance and the restriction of breakage of the gate insulation film.
    Type: Application
    Filed: June 6, 2013
    Publication date: April 30, 2015
    Applicant: Denso Corporation
    Inventors: Yuichi Takeuchi, Naohiro Suzuki, Masahiro Sugimoto, Hidefumi Takaya, Akitaka Soeno, Jun Morimoto, Narumasa Soejima, Yukihiko Watanabe
  • Patent number: 8952430
    Abstract: The present application relates to technology for improving a withstand voltage of a semiconductor device. The semiconductor device includes a termination area that surrounds a cell area. The cell area is provided with a plurality of main trenches. The termination area is provided with one or more termination trenches surrounding the cell area. A termination trench is disposed at an innermost circumference of one or more termination trenches. A body region is disposed on a surface of a drift region. Each main trench reaches the drift region. A gate electrode is provided within each main trench. The termination trench reaches the drift region. Sidewalls and a bottom surface of the termination trench are covered with a insulating layer. A surface of the insulating layer covering the bottom surface of the termination trench is covered with a buried electrode. A gate potential is applied to the buried electrode.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: February 10, 2015
    Assignees: Denso Corporation, Toyota Jidosha Kabushiki Kaisha
    Inventors: Hidefumi Takaya, Hideo Matsuki, Naohiro Suzuki, Tsuyoshi Ishikawa
  • Patent number: 8901573
    Abstract: A semiconductor device includes a silicon carbide semiconductor substrate, a transistor formed in a cell region of the semiconductor substrate, and a voltage-breakdown-resistant structure formed in a region which surrounds an outer periphery of the cell region. The semiconductor substrate includes a first conductivity type substrate, a first conductivity type drift layer on the first conductivity type substrate, a second conductivity type layer on the drift layer, and a first conductivity type layer on the second conductivity type layer. The voltage-breakdown-resistant structure includes a first recess which surrounds the outer periphery of the cell region and reaches the drift layer, a trench located at a side surface of the recess on an inner periphery of the recess, and a second conductivity type buried layer buried in the trench to provide the side surface of the first recess.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: December 2, 2014
    Assignee: DENSO CORPORATION
    Inventors: Yuichi Takeuchi, Naohiro Suzuki
  • Publication number: 20140252465
    Abstract: A semiconductor device has a semiconductor substrate including a body region, a drift region, a trench that extends from a surface of the semiconductor substrate into the drift region through the body region, and a source region located adjacent to the trench in a range exposed to the surface of the semiconductor substrate, the source region being isolated from the drift region by the body region. A specific layer is disposed on a bottom of the trench, and it has a characteristic of forming a depletion layer at a junction between the specific layer and the drift region. An insulating layer covers an upper surface of the specific layer and a sidewall of the trench. A conductive portion is formed on a part of the side wall of the trench. The conductive portion is joined to the specific layer, and reaches the surface of the semiconductor substrate.
    Type: Application
    Filed: October 17, 2012
    Publication date: September 11, 2014
    Applicants: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hidefumi Takaya, Hideo Matsuki, Naohiro Suzuki, Tsuyoshi Ishikawa, Narumasa Soejima, Yukihiko Watanabe
  • Patent number: 8782650
    Abstract: A stream data processing apparatus creates a plurality of partition data on the basis of stream data, and distributes the partition data to a plurality of computers. Specifically, the stream data processing apparatus acquires from the stream data a data element group that is configured in the number of data elements based on the processing capability of the partition data destination computer, and decides an auxiliary data part of this data element group based on a predetermined value. The stream data processing apparatus creates partition data that include the acquired data element group and END data. The data element group is configured from the auxiliary data part and a result usage data part.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: July 15, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Kenta Takahashi, Naohiro Suzuki
  • Publication number: 20140175508
    Abstract: A semiconductor device includes a first conductivity-type drift region including an exposed portion, a plurality of second conductivity-type body regions, a first conductivity-type source region, a gate portion and a Schottky electrode. The drift region is defined in a semiconductor layer, and the exposed portion exposes on a surface of the semiconductor layer. The body regions are disposed on opposite sides of the exposed portion. The source region is separated from the drift region by the body region. The gate portion is disposed to oppose the body region. The exposed portion is formed with a groove, and the Schottky electrode is disposed in the groove. The Schottky electrode has a Schottky contact with the exposed portion.
    Type: Application
    Filed: December 23, 2013
    Publication date: June 26, 2014
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Naohiro SUZUKI, Akitaka SOENO, Sachiko AOI, Yukihiko WATANABE
  • Publication number: 20140145212
    Abstract: A semiconductor device includes a silicon carbide semiconductor substrate, a transistor formed in a cell region of the semiconductor substrate, and a voltage-breakdown-resistant structure formed in a region which surrounds an outer periphery of the cell region. The semiconductor substrate includes a first conductivity type substrate, a first conductivity type drift layer on the first conductivity type substrate, a second conductivity type layer on the drift layer, and a first conductivity type layer on the second conductivity type layer. The voltage-breakdown-resistant structure includes a first recess which surrounds the outer periphery of the cell region and reaches the drift layer, a trench located at a side surface of the recess on an inner periphery of the recess, and a second conductivity type buried layer buried in the trench to provide the side surface of the first recess.
    Type: Application
    Filed: August 8, 2012
    Publication date: May 29, 2014
    Applicant: DENSO CORPORATION
    Inventors: Yuichi Takeuchi, Naohiro Suzuki