Abstract: A method for manufacturing a dual work function semiconductor device includes forming a first silicon oxide layer on a substrate and forming a first hafnium-containing dielectric material layer on the first silicon oxide layer. The method further includes forming an aluminum-containing dielectric material layer on the first hafnium-containing dielectric material layer and performing a thermal treatment to intermix the silicon oxide layer, the first hafnium-containing dielectric material layer and the aluminum-containing dielectric material layers. This results in an intermixing dielectric layer containing hafnium, aluminum, silicon, and oxygen. The method further includes forming a first metal-containing conductive layer on the intermixing dielectric layer and patterning the first metal-containing conductive layer and the intermixing dielectric layer, thereby forming a first gate stack in a first region.

Abstract: A method for manufacturing a dual work function semiconductor device includes forming a first silicon oxide layer on a substrate and forming a first hafnium-containing dielectric material layer on the first silicon oxide layer. The method further includes forming an aluminum-containing dielectric material layer on the first hafnium-containing dielectric material layer and performing a thermal treatment to intermix the silicon oxide layer, the first hafnium-containing dielectric material layer and the aluminum-containing dielectric material layers. This results in an intermixing dielectric layer containing hafnium, aluminum, silicon, and oxygen. The method further includes forming a first metal-containing conductive layer on the intermixing dielectric layer and patterning the first metal-containing conductive layer and the intermixing dielectric layer, thereby forming a first gate stack in a first region.

Abstract: A gate insulating film is formed on a semiconductor substrate having a first region in which a first conductivity type transistor is formed and a second region in which a second conductivity type transistor is formed. Next, a metal film and a first metal nitride film are sequentially formed on the gate insulating film. Next, part of each of the metal film and the first metal nitride film that is located in the second region is removed, thereby exposing part of the gate insulating film that is located in the second region. Next, a second metal nitride film made of a same metal nitride as the first metal nitride film is formed on the part of the gate insulating film that is located in the second region.

Abstract: A semiconductor device has a gate insulating film formed on a semiconductor substrate, a second gate electrode portion of a gate electrode including a TiN film and a polysilicon film that are successively formed on the gate insulating film, and an interlayer insulating film formed on the semiconductor substrate so as to cover the gate electrode. A contact formed to extend through the interlayer insulating film and the polysilicon film is directly connected to the TiN film.

Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first insulating film on a semiconductor substrate; removing part of the first insulating film; forming a second insulating film having a leakage current density higher than that of the first insulating film on a region where the part of the first insulating film has been removed on the semiconductor substrate; forming an undoped semiconductor film on the first and second insulating films; implanting an impurity into part of the undoped semiconductor film, thereby defining semiconductor regions of a first conductivity type dotted as discrete islands; forming a third insulating film on the semiconductor regions of the first conductivity type and the undoped semiconductor film; and removing part of the third insulating film by wet etching. At least the second insulating film is formed under the semiconductor regions of the first conductivity type.

Abstract: A method for manufacturing a dual work function device is disclosed. In one aspect, the process includes a first and second region in a substrate. The method includes forming a first transistor in the first region which has a first work function. Subsequently, a second transistor is formed in the second region having a different work function. The process of forming the first transistor includes providing a first gate dielectric stack having a first gate dielectric layer and a first gate dielectric capping layer on the first gate dielectric layer, performing a thermal treatment to modify the first gate dielectric stack, the modified first gate dielectric stack defining the first work function, providing a first metal gate electrode layer on the modified first gate dielectric stack, and patterning the first metal gate electrode layer and the modified first gate dielectric stack.

Abstract: A semiconductor device has a gate insulating film formed on a semiconductor substrate, a second gate electrode portion of a gate electrode including a TiN film and a polysilicon film that are successively formed on the gate insulating film, and an interlayer insulating film formed on the semiconductor substrate so as to cover the gate electrode. A contact formed to extend through the interlayer insulating film and the polysilicon film is directly connected to the TiN film.

Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first insulating film on a semiconductor substrate; removing part of the first insulating film; forming a second insulating film having a leakage current density higher than that of the first insulating film on a region where the part of the first insulating film has been removed on the semiconductor substrate; forming an undoped semiconductor film on the first and second insulating films; implanting an impurity into part of the undoped semiconductor film, thereby defining semiconductor regions of a first conductivity type dotted as discrete islands; forming a third insulating film on the semiconductor regions of the first conductivity type and the undoped semiconductor film; and removing part of the third insulating film by wet etching. At least the second insulating film is formed under the semiconductor regions of the first conductivity type.

Abstract: A wafer for charge amount evaluation having a silicon substrate and p-type regions sandwiched between a first silicon oxide film and a SA-NSG film and surrounded by an undoped silicon film is prepared and subjected to a target process for which an amount of charge is to be evaluated. Then, etching is performed by using a BHF solution. By measuring an amount of etching in the p-type region, an amount of positive charge caused by the process in the wafer can be evaluated quantitatively in an easy and convenient manner.

Abstract: A wafer for charge amount evaluation having a silicon substrate and p-type regions sandwiched between a first silicon oxide film and a SA-NSG film and surrounded by an undoped silicon film is prepared and subjected to a target process for which an amount of charge is to be evaluated. Then, etching is performed by using a BHF solution. By measuring an amount of etching in the p-type region, an amount of positive charge caused by the process in the wafer can be evaluated quantitatively in an easy and convenient manner.

Abstract: The electrode structure of this invention includes a silicon-containing film containing silicon as a principal constituent; a barrier metal layer of titanium nitride rich in titanium as compared with a stoichiometric ratio formed on the silicon-containing film; and a metal film with a high melting point formed on the barrier metal layer.

Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first insulating film on a semiconductor substrate; removing part of the first insulating film; forming a second insulating film having a leakage current density higher than that of the first insulating film on a region where the part of the first insulating film has been removed on the semiconductor substrate; forming an undoped semiconductor film on the first and second insulating films; implanting an impurity into part of the undoped semiconductor film, thereby defining semiconductor regions of a first conductivity type dotted as discrete islands; forming a third insulating film on the semiconductor regions of the first conductivity type and the undoped semiconductor film; and removing part of the third insulating film by wet etching. At least the second insulating film is formed under the semiconductor regions of the first conductivity type.

Abstract: A wafer for charge amount evaluation having a silicon substrate and p-type regions sandwiched between a first silicon oxide film and a SA-NSG film and surrounded by an undoped silicon film is prepared and subjected to a target process for which an amount of charge is to be evaluated. Then, etching is performed by using a BHF solution. By measuring an amount of etching in the p-type region, an amount of positive charge caused by the process in the wafer can be evaluated quantitatively in an easy and convenient manner.

Abstract: In a method for manufacturing a semiconductor device, impurity ion is implanted into a semiconductor layer so as to form an ion implantation region in the semiconductor layer, and at least the ion implantation region is turned amorphous. Then, an insulating film is formed on the semiconductor layer at a temperature at which the ion implantation region is not crystallized, and then the semiconductor layer is annealed in a non-oxidizing atmosphere so as to activate the impurity ion implanted into the semiconductor layer.

Abstract: A first metal film of a first metal is deposited on a silicon-containing film containing silicon as a principal constituent, and a second metal film of a nitride of a second metal is deposited on the first metal film. Thereafter, a metal film with a high melting point is deposited on the second metal film, so as to form a multi-layer film of the silicon-containing film, the first metal film, the second metal film and the metal film with a high melting point. The multi-layer film is then subjected to annealing at a temperature of 750° C. or more. In this case, the first metal is nitrided to be changed into a nitride of the first metal and a silicide layer of the first metal is not formed in a surface portion of the silicon-containing film before the annealing.

Abstract: In a method for manufacturing a semiconductor device, impurity ion is implanted into a semiconductor layer so as to form an ion implantation region in the semiconductor layer, and at least the ion implantation region is turned amorphous. Then, an insulating film is formed on the semiconductor layer at a temperature at which the ion implantation region is not crystallized, and then the semiconductor layer is annealed in a non-oxidizing atmosphere so as to activate the impurity ion implanted into the semiconductor layer.

Abstract: After depositing a first metal film of a first metal on a silicon-containing film including silicon as a main component, a second metal film of a nitride of a second metal is deposited on the first metal film. Then, a high-melting-point metal film is deposited on the second metal film, so as to form an electrode structure including the silicon-containing film, the first metal film, the second metal film and the high-melting-point metal film. The electrode structure is then subjected to a heat treatment at 750° C. or more. The first metal film has such a thickness that the first metal is nitrided to be changed into a nitride of the first metal and a silicide layer of the first metal is not formed in a surface portion of the silicon-containing film after the heat treatment.

Abstract: After forming a barrier film on a silicon-containing film including silicon as a main component, a high-melting-point metal film is deposited on the barrier film, so as to form a laminated structure including the silicon-containing film, the barrier film and the high-melting-point metal film. The laminated structure is subjected to a heat treatment at a temperature of 750° C. or more. The barrier film is formed by forming a first metal film of a nitride of a metal on the silicon-containing film; forming, on the first metal film, a second metal film of the metal or the nitride of the metal with a smaller nitrogen content than the first metal film; and forming, on the second metal film, a third metal film of the nitride of the metal with a larger nitrogen content than the second metal film.

Abstract: The electrode structure of this invention includes a silicon-containing film containing silicon as a principal constituent; a barrier metal layer of titanium nitride rich in titanium as compared with a stoichiometric ratio formed on the silicon-containing film; and a metal film with a high melting point formed on the barrier metal layer.

Abstract: A first metal film of a first metal is deposited on a silicon-containing film containing silicon as a principal constituent, and a second metal film of a nitride of a second metal is deposited on the first metal film. Thereafter, a metal film with a high melting point is deposited on the second metal film, so as to form a multi-layer film of the silicon-containing film, the first metal film, the second metal film and the metal film with a high melting point. The multi-layer film is then subjected to annealing at a temperature of 750° C. or more. In this case, the first metal is nitrided to be changed into a nitride of the first metal and a silicide layer of the first metal is not formed in a surface portion of the silicon-containing film before the annealing.