Patents by Inventor Naohito MOROZUMO

Naohito MOROZUMO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200176061
    Abstract: According to one embodiment, a semiconductor memory includes: a first bit line; a first select transistor having a first terminal connected to the first bit line; a first memory cell connected to a second terminal of the first select transistor; a circuit connected to the first bit line and applying an erase voltage to be applied to the first memory cell to the bit line via the first terminal and the second terminal; and a diode connected to the first bit line and the first circuit.
    Type: Application
    Filed: September 11, 2019
    Publication date: June 4, 2020
    Applicant: Toshiba Memory Corporation
    Inventors: Hiroshi MAEJIMA, Katsuaki ISOBE, Naohito MOROZUMO, Go SHIKATA, Susumu FUJIMURA