Patents by Inventor Naokatsu Sano

Naokatsu Sano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120175639
    Abstract: It is an object of the present invention to provide a method for manufacturing tantalum carbide which can form tantalum carbide having a prescribed shape using a simple method, can form the tantalum carbide having a uniform thickness even when the tantalum carbide is coated on the surface of an article and is not peeled off by a thermal history, tantalum carbide obtained by the manufacturing method, wiring of tantalum carbide, and electrodes of tantalum carbide. The tantalum carbide is formed on the surface of tantalum or a tantalum alloy by placing the tantalum or tantalum alloy in a vacuum heat treatment furnace, heat-treating the tantalum or tantalum alloy under a condition where a native oxide layer of Ta2O5 formed on the surface of tantalum or tantalum alloy is sublimated to remove the Ta2O5, introducing a carbon source into the vacuum heat treatment furnace, and then heat-treating.
    Type: Application
    Filed: March 16, 2012
    Publication date: July 12, 2012
    Applicant: THE NEW INDUSTRY RESEARCH ORGANIZATION
    Inventors: Tadaaki Kaneko, Yasushi Asaoka, Naokatsu Sano
  • Patent number: 8211244
    Abstract: The present invention relates to a method for manufacturing tantalum carbide which can form tantalum carbide having a prescribed shape using a simple method, can form the tantalum carbide having a uniform thickness even when the tantalum carbide is coated on the surface of an article and is not peeled off by a thermal history, tantalum carbide obtained by the manufacturing method, wiring of tantalum carbide, and electrodes of tantalum carbide, where the tantalum carbide is formed on the surface of tantalum or a tantalum alloy by placing the tantalum or tantalum alloy in a vacuum heat treatment furnace, heat-treating the tantalum or tantalum alloy under a condition where a native oxide layer of Ta2O5 formed on the surface of tantalum or tantalum alloy is sublimated to remove the Ta2O5, introducing a carbon source into the vacuum heat treatment furnace, and then heat-treating.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: July 3, 2012
    Assignee: Toyo Tanso Co., Ltd.
    Inventors: Tadaaki Kaneko, Yasushi Asaoka, Naokatsu Sano
  • Patent number: 8110322
    Abstract: The invention provides a method for forming a selective mask on a surface of a layer of AlXGaYIn1-X-YAsZP1-Z or AlXGaYIn1-X-YNZAs1-Z (0?X?1, 0?Y?1, 0?Z?1), which is a method for forming a mask with a minute width suitable for microfabrication in nano-order. (1) An energy beam 4a, 4b is selectively irradiated onto a natural oxide layer 2 formed on the surface of the layer 1 of AlXGaYIn1-X-YAsZP1-Z or AlXGaYIn1-X-YNZAs1-Z. (2) Of the natural oxide layer 2, parts other than parts onto which the energy beam 4a, 4b has been irradiated is removed by heating. (3) The natural oxide layer 2 of the parts onto which the energy beam 4a, 4b has been irradiated is partially removed by heating while alternatively carrying out a rise and fall in heating temperature.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: February 7, 2012
    Assignee: Riber
    Inventors: Naokatsu Sano, Tadaaki Kaneko
  • Publication number: 20100284895
    Abstract: It is an object of the present invention to provide a method for manufacturing tantalum carbide which can form tantalum carbide having a prescribed shape using a simple method, can form the tantalum carbide having a uniform thickness even when the tantalum carbide is coated on the surface of an article and is not peeled off by a thermal history, tantalum carbide obtained by the manufacturing method, wiring of tantalum carbide, and electrodes of tantalum carbide. The tantalum carbide is formed on the surface of tantalum or a tantalum alloy by placing the tantalum or tantalum alloy in a vacuum heat treatment furnace, heat-treating the tantalum or tantalum alloy under a condition where a native oxide layer of Ta2O5 formed on the surface of tantalum or tantalum alloy is sublimated to remove the Ta2O5, introducing a carbon source into the vacuum heat treatment furnace, and then heat-treating.
    Type: Application
    Filed: May 17, 2010
    Publication date: November 11, 2010
    Applicant: TOYO TANSO CO., LTD.
    Inventors: Tadaaki KANEKO, Yasushi Asaoka, Naokatsu Sano
  • Publication number: 20100143828
    Abstract: The invention provides a method for forming a selective mask on a surface of a layer of AlXGaYIn1-X-YAsZP1-Z or AlXGaYIn1-X-YNZAs1-Z (0?X?1, 0?Y?1, 0?Z?1), which is a method for forming a mask with a minute width suitable for microfabrication in nano-order. (1) An energy beam 4a, 4b is selectively irradiated onto a natural oxide layer 2 formed on the surface of the layer 1 of AlXGaYIn1-X-YAsZP1-Z or AlXGaYIn1-X-YNZAs1-Z. (2) Of the natural oxide layer 2, parts other than parts onto which the energy beam 4a, 4b has been irradiated is removed by heating. (3) The natural oxide layer 2 of the parts onto which the energy beam 4a, 4b has been irradiated is partially removed by heating while alternatively carrying out a rise and fall in heating temperature.
    Type: Application
    Filed: April 25, 2005
    Publication date: June 10, 2010
    Inventors: Naokatsu Sano, Tadaaki Kaneko
  • Patent number: 7704861
    Abstract: Onto a surface of an AlxGayIn1-x-yAszP1-z (0?x, y, z?1) layer including GaAs alone or an InP substrate, an electron beam controlled to an arbitrary electron beam diameter and current density is irradiated so as to selectively substitute or generate Ga2O3 for a natural oxide layer formed on the AlxGayIn1-x-yAszP1-z, layer surface, then the AlxGayIn1-x-yAszP1-z layer surface is dry-etched by a bromide in single atomic layer units, whereby the natural oxide layer other than the part substituted by the Ga2O3 and AlxGayIn1-x-yAszP1-z substrate are removed.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: April 27, 2010
    Assignee: Riber SA
    Inventors: Tadaaki Kaneko, Kiyoshi Sakaue, Naokatsu Sano
  • Patent number: 7637998
    Abstract: Single crystal SiC, having no fine grain boundaries, a micropipe defect density of 1/cm2 or less and a crystal terrace of 10 micrometer or more is obtained by a high-temperature liquid phase growth method using a very thin Si melt layer. The method does not require temperature difference control between the growing crystal surface and a raw material supply polycrystal and preparation of a doped single crystal SiC is possible.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: December 29, 2009
    Assignee: Kwansei Gakuin Educational Foundation
    Inventors: Tadaaki Kaneko, Yasushi Asaoka, Naokatsu Sano
  • Patent number: 7527869
    Abstract: The invention is a high-temperature liquid phase growth method using a very thin Si melt layer and characterized in that there is no need of strict temperature difference control between the growing crystal surface and a raw material supply polycrystal, and control of impurity addition is possible. The grown single crystal SiC is characterized in that no fine grain boundaries exist therein, the density of micropipe defects in the growth surface is 1/cm2 or less, and the crystal has a terrace of 10 micrometer or more and a multi-molecular layer step as the minimum unit of a three-molecular layer.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: May 5, 2009
    Assignee: Kwansei Gakuin Educational Foundation
    Inventors: Tadaaki Kaneko, Yasushi Asaoka, Naokatsu Sano
  • Publication number: 20090038538
    Abstract: Single crystal SiC, having no fine grain boundaries, a micropipe defect density of 1/cm2 or less and a crystal terrace of 10 micrometer or more is obtained by a high-temperature liquid phase growth method using a very thin Si melt layer. The method does not require temperature difference control between the growing crystal surface and a raw material supply polycrystal and preparation of a doped single crystal SiC is possible.
    Type: Application
    Filed: October 14, 2008
    Publication date: February 12, 2009
    Applicant: THE NEW INDUSTRY RESEARCH ORGANIZATION
    Inventors: Tadaaki Kaneko, Yasushi Asaoka, Naokatsu Sano
  • Patent number: 7432176
    Abstract: Surface of a thin film formed on a surface of substrate of AlxGayIn1-x-yAszP1-z (0?x<1, 0?y and z?1) including substances GaAs and InP is irradiated with electron beams controlled at any arbitrary electron beam diameter and current density so as to cause any natural oxide film formed on GaAs surface to undergo selective Ga2O3 substitution or formation. Thereafter, the temperature of the substrate is adjusted to given temperature so as to effect detachment of the natural oxide film at region other than that of Ga2O3 substitution. Selective growth of a Group III-V compound semiconductor crystal is carried out on the substrate on its side of natural oxide film detachment in accordance with the molecular beam epitaxial growing technique to thereby achieve an increase of substrate density. On-site formation of a circuit pattern having the crystal film thickness along the direction of crystal growth uniformalized on the order of nanometers is accomplished.
    Type: Grant
    Filed: April 13, 2004
    Date of Patent: October 7, 2008
    Assignee: Riber
    Inventors: Tadaaki Kaneko, Naokatsu Sano, Kiyoshi Sakaue
  • Publication number: 20070232029
    Abstract: Surface of a thin film formed on a surface of substrate of AlxGayIn1-x-yAszP1-z (0?x<1, 0?y and z?1) including substances GaAs and InP is irradiated with electron beams controlled at any arbitrary electron beam diameter and current density so as to cause any natural oxide film formed on GaAs surface to undergo selective Ga2O3 substitution or formation. Thereafter, the temperature of the substrate is adjusted to given temperature so as to effect detachment of the natural oxide film at region other than that of Ga2O3 substitution. Selective growth of a Group III-V compound semiconductor crystal is carried out on the substrate on its side of natural oxide film detachment in accordance with the molecular beam epitaxial growing technique to thereby achieve an increase of substrate density. On-site formation of a circuit pattern having the crystal film thickness along the direction of crystal growth uniformalized on the order of nanometers is accomplished.
    Type: Application
    Filed: April 13, 2004
    Publication date: October 4, 2007
    Inventors: Tadaaki Kaneko, Naokatsu Sano, Kiyoshi Sakaue
  • Publication number: 20070059501
    Abstract: It is an object of the present invention to provide a method for manufacturing tantalum carbide which can form tantalum carbide having a prescribed shape using a simple method, can form the tantalum carbide having a uniform thickness even when the tantalum carbide is coated on the surface of an article and is not peeled off by a thermal history, tantalum carbide obtained by the manufacturing method, wiring of tantalum carbide, and electrodes of tantalum carbide. The tantalum carbide is formed on the surface of tantalum or a tantalum alloy by placing the tantalum or tantalum alloy in a vacuum heat treatment furnace, heat-treating the tantalum or tantalum alloy under a condition where a native oxide layer of Ta2O5 formed on the surface of tantalum or tantalum alloy is sublimated to remove the Ta205, introducing a carbon source into the vacuum heat treatment furnace, and then heat-treating.
    Type: Application
    Filed: July 30, 2004
    Publication date: March 15, 2007
    Applicant: THE NEW INDUSTRY RESEARCH ORGANIZATION
    Inventors: Tadaaki Kaneko, Yasushi Asaoka, Naokatsu Sano
  • Publication number: 20040237879
    Abstract: The invention is a high-temperature liquid phase growth method using a very thin Si melt layer and characterized in that there is no need of strict temperature difference control between the growing crystal surface and a raw material supply polycrystal, and control of impurity addition is possible. The grown single crystal SiC is characterized in that no fine grain boundaries exist therein, the density of micropipe defects in the growth surface is 1/cm2 or less, and the crystal has a terrace of 10 micrometer or more and a multi-molecular layer step as the minimum unit of a three-molecular layer.
    Type: Application
    Filed: June 30, 2004
    Publication date: December 2, 2004
    Inventors: Tadaaki Kaneko, Yasushi Asaoka, Naokatsu Sano