Patents by Inventor Naoki Aihara

Naoki Aihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10348015
    Abstract: A socket connector includes a socket substrate having first socket substrate conductors and second socket substrate conductors, receptacle contacts electrically coupled to corresponding first socket substrate conductors and socket contacts electrically coupled to corresponding second socket substrate conductors. The receptacle contacts have receptacles receiving pin contacts of an electronic package and the socket contacts have terminating ends and mating ends with deflectable spring beams terminated to package contacts of the electronic package. At least one of the first socket substrate conductors and the second socket substrate conductors are configured to electrically connect the electronic package with the host circuit board.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: July 9, 2019
    Assignees: TE Connectivity Corporation, Tyco Electronics Japan G.K.
    Inventors: Jeffery Walter Mason, Takeshi Nakashima, Naoki Hashimoto, Shigeru Aihara
  • Publication number: 20190157723
    Abstract: An all-solid-state secondary battery including: a cathode including a cathode active material layer; an anode including an anode current collector, and an anode active material layer on the anode current collector, wherein the anode active material layer includes an anode active material which is alloyable with lithium or forms a compound with lithium; and a solid electrolyte layer between the cathode and the anode, wherein a ratio of an initial charge capacity (b) of the anode active material layer to an initial charge capacity (a) of the cathode active material layer satisfies a condition of Equation 1: 0.01<(b/a)<0.5, wherein a is the initial charge capacity of the cathode active material layer determined from a first open circuit voltage to a maximum charging voltage, and b is the initial charge capacity of the anode active material layer determined from a second open circuit voltage to 0.01 volts vs. Li/Li+.
    Type: Application
    Filed: November 20, 2018
    Publication date: May 23, 2019
    Inventors: Naoki SUZUKI, Nobuyoshi YASHIRO, Takanobu YAMADA, Yuichi AIHARA
  • Publication number: 20190150311
    Abstract: A socket connector includes a socket assembly having a socket frame, a socket substrate coupled to the socket frame and socket contacts terminated to the socket substrate. The socket substrate has first and second upper mating areas including first and second socket substrate conductors for mating with an electronic package and an electrical component, respectively. The socket contacts define an interface with the electronic package. The socket assembly is configured to electrically connect the electronic package with both a host circuit board and the electrical component.
    Type: Application
    Filed: March 30, 2018
    Publication date: May 16, 2019
    Inventors: Jeffery Walter Mason, Alex An, Takeshi Nakashima, Naoki Hashimoto, Shigeru Aihara
  • Publication number: 20190148860
    Abstract: A socket connector includes a socket substrate having first socket substrate conductors and second socket substrate conductors, receptacle contacts electrically coupled to corresponding first socket substrate conductors and socket contacts electrically coupled to corresponding second socket substrate conductors. The receptacle contacts have receptacles receiving pin contacts of an electronic package and the socket contacts have terminating ends and mating ends with deflectable spring beams terminated to package contacts of the electronic package. At least one of the first socket substrate conductors and the second socket substrate conductors are configured to electrically connect the electronic package with the host circuit board.
    Type: Application
    Filed: March 30, 2018
    Publication date: May 16, 2019
    Inventors: Jeffery Walter Mason, Takeshi Nakashima, Naoki Hashimoto, Shigeru Aihara
  • Patent number: 6873621
    Abstract: A system for controlling a bandwidth when receiving and reassembling a consecutive data stream transferred while segmented by AAL1 format cells which enables correct determination of non-P and P formats and reassembly of cells even when error arises in multiple bits including the CSI bit of an AAL1 cell or when adding dummy cells and thereby enabling prevention of a gap in data in a frame, comprising, in a data reassembly unit which reassembles received cells, an 8-cell buffer for storing 8 cells of a cycle of a sequence count (SC) of 0 to 7 and sending the cells out to a later stage after a check unit of a sequence number (SN) field confirms normalcy of the cells and a control unit for control so that the number of P format cells stored in the 8-cell buffer becomes 1 cell when 8 cells are stored in the 8-cell buffer.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: March 29, 2005
    Assignee: Fujitsu Limited
    Inventors: Jyoei Kamoi, Yoshihiro Uchida, Naoki Aihara, Mikio Nakayama, Kazuhito Yasue, Kazuhiko Kumagai
  • Patent number: 6856594
    Abstract: A method and system including ATM switching equipment provided for switching between a working channel and a protection channel in an ATM network. The method and system include the following processes: In each cell for transmission providing an indication of whether the cell belongs connection currently in a working state via a working channel; cells are duplicated on each connection basis; the duplicated cells are transmitted simultaneously on both a working channel and a protection channel; and valid cells are selected from received cells according to the indication in each cell indicating whether the relevant connection is currently in a working state.
    Type: Grant
    Filed: August 9, 2000
    Date of Patent: February 15, 2005
    Assignee: Fujitsu Limited
    Inventors: Naoki Aihara, Hichiro Hayami, Iwao Tada, Tomoyuki Yamaguchi
  • Publication number: 20020093949
    Abstract: A SOH (101) of a transmission frame of SDH (SONET) is terminated at a sender-side transmitter (3 or 4) and is added to remaining data at a receiver-side transmitter (4 or 3). At the sender-side transmitter (3 or 4), the remaining data (102, 103), including an administrative unit pointer (102) is converted into ATM cells and the ATM cells are sent out to an ATM network (2). After that, at the receiver-side transmitter (4 or 3), the remaining data is restored from the received ATM cells. As a result, operation, administration, and maintenance are independently performed over sections disposed at the input and the output sides of the ATM network (2). Further, processes (conversion to ATM cells, restoring SDH frames) are performed irrespective of the difference between the administrative pointer (102) and a payload (103), and the number of the signal paths (104) multiplexed in the payload (103).
    Type: Application
    Filed: February 25, 2002
    Publication date: July 18, 2002
    Inventors: Kazuhito Yasue, Mikio Makayama, Yoshihiro Uchida, Naoki Aihara, Jyoei Kamoi
  • Patent number: 6289014
    Abstract: The first input route information with a virtual path identifier, a virtual channel identifier and a line identifier set in the header of an input cell is compressed, and a base address with a lower number of bits than the input route information is generated from a part of the second input route information selected by the compression using a first conversion table. Then, third data consisting of both the base address and a part of the second input route information other than the part of the second input route information selected by the compression are generated, and the third data are converted to a routing tag using a second conversion table.
    Type: Grant
    Filed: September 2, 1998
    Date of Patent: September 11, 2001
    Assignee: Fujitsu Limited
    Inventors: Tadashi Hoshino, Hichiro Hayami, Naoki Aihara
  • Publication number: 20010017858
    Abstract: A system for controlling a bandwidth when receiving and reassembling a consecutive data stream transferred while segmented by AAL1 format cells which enables correct determination of non-P and P formats and reassembly of cells even when error arises in multiple bits including the CSI bit of an AAL1 cell or when adding dummy cells and thereby enabling prevention of a gap in data in a frame, comprising, in a data reassembly unit which reassembles received cells, an 8-cell buffer for storing 8 cells of a cycle of a sequence count (SC) of 0 to 7 and sending the cells out to a later stage after a check unit of a sequence number (SN) field confirms normalcy of the cells and a control unit for control so that the number of P format cells stored in the 8-cell buffer becomes 1 cell when 8 cells are stored in the 8-cell buffer.
    Type: Application
    Filed: January 12, 2001
    Publication date: August 30, 2001
    Applicant: Fujitsu Limited
    Inventors: Jyoei Kamoi, Yoshihiro Uchida, Naoki Aihara, Mikio Nakayama, Kazuhito Yasue, Kazuhiko Kumagai
  • Patent number: 6275472
    Abstract: An apparatus for pass control of transmission cells for preventing cells having headers including a specific pattern of multi-bit error from being erroneously transmitted. The pass control apparatus is operated by a method comprising (i) a step of monitoring a communication quality of each received frame; (ii) a step of temporarily buffering one monitored frame's worth of cells for each frame; (iii) a step of determining whether or not the communication quality of the monitored frame exceeds a predetermined threshold level; and (iv) a step of erasing all of the cells including one-bit error and multi-bit error in their headers from one frame's worth of buffered cells when the communication quality deteriorates exceeding the predetermined threshold level, while passing the buffered cells as they are when it does not exceed the threshold level.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: August 14, 2001
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Yamaguchi, Naoki Aihara
  • Patent number: 6212186
    Abstract: The invention concerns an ATM exchange, and is directed in particular to the provision of a cell bandwidth control apparatus for performing bandwidth control for ATM cells sent from the ATM exchange onto the line side. The cell bandwidth control apparatus includes forced empty cell inserting means for forcibly inserting empty cells in a highway connected to an ATM switch. The forced empty cell inserting means inserts forced empty cells in an outgoing highway leading from the ATM switch to a line adapter and thereby limits the line bandwidth of the outgoing highway to within the bandwidth of the line accommodated in the line adapter.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: April 3, 2001
    Assignee: Fujitsu Limited
    Inventors: Iwao Tada, Jyoei Kamoi, Tomoyuki Yamaguchi, Naoki Aihara
  • Patent number: 6046996
    Abstract: An identifier translation apparatus is provided that does not require a prohibitively large memory capacity and that is simple in construction and capable of increasing the speed of processing. Using an address consisting of a VPI and the high-order 6 bits of a VCI, a first-stage table is read to retrieve a block number, and using an address consisting of the retrieved block number and the low-order 6 bits of the VCI, a second-stage table is read to retrieve a routing tag. The routing tag is then appended to a cell.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: April 4, 2000
    Assignee: Fujitsu Limited
    Inventors: Tadashi Hoshino, Naoki Aihara, Takashi Tabu, Tomoyuki Yamaguchi
  • Patent number: 5737338
    Abstract: A method of testing an ATM exchange having a redundant structure that includes an active system and a standby system includes the steps of transmitting a test cell from a testing device to both the active system and standby system, causing the test cell to pass through ATM switches in each of the active and standby systems, returning the test cell that has passed through the ATM switches of both systems to the testing device, and conducting a test of the ACT switches in the active and standby systems by comparing data contained in the transmitted test cell with data contained in a test cell received from the active system or standby system.
    Type: Grant
    Filed: August 2, 1995
    Date of Patent: April 7, 1998
    Assignee: Fujitsu Limited
    Inventors: Nobuhiko Eguchi, Hiroyuki Kudou, Kazumasa Sonoda, Naoki Aihara
  • Patent number: 5535196
    Abstract: A police system of ATM exchange comprises an ATM exchange for exchanging the ATM cells, and an input cell speed limiting unit disposed in an input side of the ATM exchange and having a plurality of elastic buffers with a read speed equivalent to a band designated to each of a plurality of subscribers accommodated in the exchange, the elastic buffers being in accordance with the subscribers, the input cell speed limiting unit being arranged to limit the speeds of cells which are transmitted from each of the subscribers to the exchange to the band designated to each of the subscriber. The ATM exchange can completely manage and restrict the band of a line. Even if a congestion state takes place instantaneously due to an excessive cell flow, it does not affect calls which are in compliance with a predetermined band.
    Type: Grant
    Filed: October 28, 1992
    Date of Patent: July 9, 1996
    Assignee: Fujitsu Limited
    Inventors: Naoki Aihara, Tadashi Hoshino
  • Patent number: 5394396
    Abstract: A supervision control system for an ATM cell switching system counts the number of cells transmitted from a subscriber in a predetermined duration unit, attaches a sign to the cells when the counted value exceeds a predetermined value, and discards the cells to which the sign is attached when a buffer does not have enough capacity during a cell multiplexation.
    Type: Grant
    Filed: June 17, 1994
    Date of Patent: February 28, 1995
    Assignee: Fujitsu Limited
    Inventors: Shuji Yoshimura, Satoshi Kakuma, Naoki Aihara, Yasuhiro Aso, Masami Murayama
  • Patent number: 5361251
    Abstract: It is determined whether or not a passing cell is a cell to be measured. If yes, a signal synchronous with the passing cycle of the cell is generated by a synchronous signal generator. The synchronous signal is digitally processed by a digital signal processor. Thus, each parameter related to the number of passing cells is obtained by converting the analysis based on the time axis to the area analysis based on the frequency axis.
    Type: Grant
    Filed: March 17, 1992
    Date of Patent: November 1, 1994
    Assignee: Fujitsu Limited
    Inventors: Naoki Aihara, Shuji Yoshimura, Naoki Fukuda, Tadashi Hoshino
  • Patent number: 5271010
    Abstract: A virtual channel converter converts a virtual path identifier and a virtual channel identifier, e.g. in a twenty-eight (28) bit frame, attached to the header part of an incoming ATM cell on an input highway to an ATM switcher to identifiers to be attached to an outgoing ATM cell on an output highway capable of fully supporting all the combinations, two hundred fifty-six (256) for example, of a virtual path identifier and a virtual channel identifier no matter where the virtual path identifier and the virtual channel identifier are located in the twenty-eight (28) bit frame. The virtual channel converter comprises a plurality of identifier comparator units and a controller. Each of the identifier comparator units has an input identifier memory for storing an identifier attached to an ATM cell and a comparator for comparing the identifiers of an incoming ATM cell with the identifiers stored in the input identifier memory.
    Type: Grant
    Filed: October 21, 1991
    Date of Patent: December 14, 1993
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Miyake, Satoshi Kakuma, Shuji Yoshimura, Naoki Aihara, Naoki Fukuda
  • Patent number: RE37435
    Abstract: A supervision control system for an ATM cell switching system counts the number of cells transmitted from a subscriber in a predetermined duration unit, attaches a sign to the cells when the counted value exceeds a predetermined value, and discards the cells to which the sign is attached when a buffer does not have enough capacity during a cell multiplexation.
    Type: Grant
    Filed: February 27, 1997
    Date of Patent: November 6, 2001
    Assignee: Fujitsu Limited
    Inventors: Shuji Yoshimura, Satoshi Kakuma, Naoki Aihara, Yasuhiro Aso, Masami Murayama