Abstract: A display device according to the present disclosure includes: pixels arranged in a matrix; a data line group that includes a pair of data lines for each pixel column; a data line drive circuit that supplies a positive-phase data signal to one of the pair of data lines, and a negative-phase data signal to the other of the pair of data lines; and an auxiliary drive circuit that is provided for each pair of data lines, and that processes the positive-phase data signal and the negative-phase data signal, in which the auxiliary drive circuit has a dead zone in a region where there is no difference between a positive-phase potential and a negative-phase potential, or where the difference in potential is smaller than a predetermined value. An electronic apparatus according to the present disclosure includes a display device having the configuration described above.

Abstract: A display device according to the present disclosure includes: pixels arranged in a matrix; a data line group that includes a pair of data lines for each pixel column; a data line drive circuit that supplies a positive-phase data signal to one of the pair of data lines, and a negative-phase data signal to the other of the pair of data lines; and an auxiliary drive circuit that is provided for each pair of data lines, and that processes the positive-phase data signal and the negative-phase data signal, in which the auxiliary drive circuit has a dead zone in a region where there is no difference between a positive-phase potential and a negative-phase potential, or where the difference in potential is smaller than a predetermined value. An electronic apparatus according to the present disclosure includes a display device having the configuration described above.

Abstract: A display device includes: data-line pairs arranged side by side along a first direction; gate lines arranged side by side along a second direction; a display section including pixels each disposed at an intersection of a data-line pair and a gate line and connected to one or both of the data-line pair; a data-line drive circuit supplying a positive-phase data signal to one of the data-line pair and a negative-phase data signal to the other, and allowing the data-line pair to stay in a high-impedance state before writing of an image signal to the pixels; and a short circuit putting the data-line pair in a short-circuit state while the data-line pair stays in the high-impedance state, and then releasing the short-circuit state Following the release of the short-circuit state, the positive-phase data signal or/and the negative-phase data signal are written into the pixel as the image signal.

Abstract: An electro-optical unit includes pixels provided correspondingly to portions where a plurality of pairs of data lines and a plurality of gate lines intersect with each other. Each of the pixels has an electro-optical device and a pixel circuit. The pixel circuit has a holding circuit connected with one of the plurality of pairs of data lines and one of the plurality of gate lines, and a selection circuit connected with an output of the holding circuit and the electro-optical device. The holding circuit is capable of sampling and holding a first image signal to be applied to one of the pair of the data lines, while sampling and holding a second image signal to be applied to the other of the pair of the data lines. The selection circuit is capable of outputting the first image signal and the second image signal to the electro-optical device selectively.

Abstract: A display device includes: data-line pairs arranged side by side along a first direction; gate lines arranged side by side along a second direction; a display section including pixels each disposed at an intersection of a data-line pair and a gate line and connected to one or both of the data-line pair; a data-line drive circuit supplying a positive-phase data signal to one of the data-line pair and a negative-phase data signal to the other, and allowing the data-line pair to stay in a high-impedance state before writing of an image signal to the pixels; and a short circuit putting the data-line pair in a short-circuit state while the data-line pair stays in the high-impedance state, and then releasing the short-circuit state Following the release of the short-circuit state, the positive-phase data signal or/and the negative-phase data signal are written into the pixel as the mage signal.

Abstract: A display device includes: data-line pairs arranged side by side along a first direction; gate lines arranged side by side along a second direction; a display section including pixels each disposed at an intersection of a data-line pair and a gate line and connected to one or both of the data-line pair; a data-line drive circuit supplying a positive-phase data signal to one of the data-line pair and a negative-phase data signal to the other, and allowing the data-line pair to stay in a high-impedance state before writing of an image signal to the pixels; and a short circuit putting the data-line pair in a short-circuit state while the data-line pair stays in the high-impedance state, and then releasing the short-circuit state Following the release of the short-circuit state, the positive-phase data signal or/and the negative-phase data signal are written into the pixel as the mage signal.

Abstract: A display device includes: data-line pairs arranged side by side along a first direction; gate lines arranged side by side along a second direction; a display section including pixels each disposed at an intersection of a data-line pair and a gate line and connected to one or both of the data-line pair; a data-line drive circuit supplying a positive-phase data signal to one of the data-line pair and a negative-phase data signal to the other, and allowing the data-line pair to stay in a high-impedance state before writing of an image signal to the pixels; and a short circuit putting the data-line pair in a short-circuit state while the data-line pair stays in the high-impedance state, and then releasing the short-circuit state Following the release of the short-circuit state, the positive-phase data signal or/and the negative-phase data signal are written into the pixel as the mage signal.

Abstract: An electro-optical unit includes pixels provided correspondingly to portions where a plurality of pairs of data lines and a plurality of gate lines intersect with each other. Each of the pixels has an electro-optical device and a pixel circuit. The pixel circuit has a holding circuit connected with one of the plurality of pairs of data lines and one of the plurality of gate lines, and a selection circuit connected with an output of the holding circuit and the electro-optical device. The holding circuit is capable of sampling and holding a first image signal to be applied to one of the pair of the data lines, while sampling and holding a second image signal to be applied to the other of the pair of the data lines. The selection circuit is capable of outputting the first image signal and the second image signal to the electro-optical device selectively.