Patents by Inventor Naoki Hanada

Naoki Hanada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8815737
    Abstract: The method for the formation of a silicide film herein provided comprises the steps of forming an Ni film on the surface of a substrate mainly composed of Si and then heat-treating the resulting Ni film to thus form an NiSi film as an upper layer of the substrate, wherein, prior to the heat-treatment for the formation of the NiSi film, the Ni film is subjected to a preannealing treatment using H2 gas at a temperature which is less than the heat-treatment temperature and which never causes the formation of any NiSi film in order to remove any impurity present in the Ni film, and the resulting Ni film is then subjected to a silicide-annealing treatment to thus form the NiSi film.
    Type: Grant
    Filed: March 19, 2012
    Date of Patent: August 26, 2014
    Assignee: Ulvac, Inc.
    Inventors: Yasushi Higuchi, Toshimitsu Uehigashi, Kazuhiro Sonoda, Harunori Ushikawa, Naoki Hanada
  • Patent number: 8669191
    Abstract: A method for the formation of an Ni film is herein disclosed, which comprises the steps of maintaining the temperature of an Si substrate at a desired level in a vacuum chamber; introducing, into the vacuum chamber, a nickel alkylamidinate (in this organometal compound, the alkyl group is a member selected from the group consisting of a methyl group, an ethyl group, a butyl group and a propyl group), H2 gas and NH3 gas; and then forming an Ni film according to the CVD technique, wherein the film-forming temperature is set at a level between higher than 280° C. and not higher than 350° C.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: March 11, 2014
    Assignee: Ulvac, Inc.
    Inventors: Toshimitsu Uehigashi, Yasushi Higuchi, Michio Ishikawa, Harunori Ushikawa, Naoki Hanada
  • Publication number: 20130042712
    Abstract: A decelerating-side tooth surface of each tooth of a drive gear contacts a corresponding one of teeth of a driven gear to transmit torque when torque transmitted between the drive gear and the driven gear is maximum, and is formed as follows. The decelerating-side tooth surface protrudes toward the corresponding tooth of the driven gear and has a circular arc curvature to a facewidth direction of the corresponding tooth. The decelerating-side tooth surface is formed so that a center of the circular arc curvature is located apart in a facewidth direction of the tooth of the drive gear from a plane perpendicular to the facewidth direction in a middle in the facewidth direction toward an opposite side from a portion of the decelerating-side tooth surface that contacts the corresponding tooth of the driven gear at the time when the transmitted torque is maximum.
    Type: Application
    Filed: May 2, 2011
    Publication date: February 21, 2013
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Seiji Hiroshima, Shinjiro Kuze, Makoto Takahashi, Naoki Hanada
  • Publication number: 20120264310
    Abstract: A method for the formation of an Ni film is herein disclosed, which comprises the steps of maintaining the temperature of an Si substrate at a desired level in a vacuum chamber; introducing, into the vacuum chamber, a nickel alkylamidinate (in this organometal compound, the alkyl group is a member selected from the group consisting of a methyl group, an ethyl group, a butyl group and a propyl group), H2 gas and NH3 gas; and then forming an Ni film according to the CVD technique, wherein the film-forming temperature is set at a level between higher than 280° C. and not higher than 350° C.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 18, 2012
    Applicant: ULVAC, INC.
    Inventors: Toshimitsu Uehigashi, Yasushi Higuchi, Michio Ishikawa, Harunori Ushikawa, Naoki Hanada
  • Publication number: 20120244701
    Abstract: The method for the formation of a silicide film herein provided comprises the steps of forming an Ni film on the surface of a substrate mainly composed of Si and then heat-treating the resulting Ni film to thus form an NiSi film as an upper layer of the substrate, wherein, prior to the heat-treatment for the formation of the NiSi film, the Ni film is subjected to a preannealing treatment using H2 gas at a temperature which is less than the heat-treatment temperature and which never causes the formation of any NiSi film in order to remove any impurity present in the Ni film, and the resulting Ni film is then subjected to a silicide-annealing treatment to thus form the NiSi film.
    Type: Application
    Filed: March 19, 2012
    Publication date: September 27, 2012
    Applicant: ULVAC, INC.
    Inventors: Yasushi Higuchi, Toshimitsu Uehigashi, Kazuhiro Sonoda, Harunori Ushikawa, Naoki Hanada
  • Patent number: 7800659
    Abstract: A recording medium has clusters assigned first cluster information pieces respectively. The clusters store a file or files of image data. When a received signal is a copying command indicative of a requested file, image data in the requested file is read from one or more clusters and is sent. Detection is made about a first cluster information piece or pieces assigned to the one or more clusters from which the image data is read. The detected first cluster information piece or pieces are labeled as a second cluster information piece or pieces. Identification is made about a first cluster information piece or pieces assigned to one or more clusters loaded with image data in the requested file. When the identified first cluster information piece or pieces are equal to the second cluster information piece or pieces, the requested file is recognized as a file which has been copied.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: September 21, 2010
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Naoki Hanada
  • Patent number: 7432958
    Abstract: A video camera which is provided with an inter-line type CCD and also which enjoys a function as a digital still camera. The video camera includes an irising mechanism for adjusting a quantity of light incident upon the CCD, an iris driving circuit for driving the irising mechanism, and a camera microcomputer for controlling operations of adjusting an incident-light quantity by the irising mechanism by controlling the iris driving circuit. The camera microcomputer controls the iris driving circuit to drive the irising mechanism, whereby the incident light upon the CCD is blocked to perform only a read-out operation while data of all the pixels is read out from the CCD.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: October 7, 2008
    Assignee: Victor Company of Japan, Limited
    Inventors: Naoki Hanada, Hiroyasu Kunimi, Norio Kurashige, Tetsuya Oura, Hiroshi Nishiyama
  • Publication number: 20080106617
    Abstract: A recording medium has clusters assigned first cluster information pieces respectively. The clusters store a file or files of image data. When a received signal is a copying command indicative of a requested file, image data in the requested file is read from one or more clusters and is sent. Detection is made about a first cluster information piece or pieces assigned to the one or more clusters from which the image data is read. The detected first cluster information piece or pieces are labeled as a second cluster information piece or pieces. Identification is made about a first cluster information piece or pieces assigned to one or more clusters loaded with image data in the requested file. When the identified first cluster information piece or pieces are equal to the second cluster information piece or pieces, the requested file is recognized as a file which has been copied.
    Type: Application
    Filed: October 30, 2007
    Publication date: May 8, 2008
    Applicant: Victor Company of Japan, Ltd.
    Inventor: Naoki Hanada
  • Publication number: 20060038914
    Abstract: A video camera which is provided with an inter-line type CCD and also which enjoys a function as a digital still camera. The video camera includes an irising mechanism for adjusting a quantity of light incident upon the CCD, an iris driving circuit for driving the irising mechanism, and a camera microcomputer for controlling operations of adjusting an incident-light quantity by the irising mechanism by controlling the iris driving circuit. The camera microcomputer controls the iris driving circuit to drive the irising mechanism, whereby the incident light upon the CCD is blocked to perform only a read-out operation while data of all the pixels is read out from the CCD.
    Type: Application
    Filed: August 23, 2005
    Publication date: February 23, 2006
    Inventors: Naoki Hanada, Hiroyasu Kunimi, Norio Kurashige, Tetsuya Oura, Hiroshi Nishiyama
  • Patent number: 5321287
    Abstract: An n-channel MOSFET, a p-channel MOSFET and a nonvolatile memory cell are provided for the same semiconductor substrate. The nonvolatile memory cell is formed on the semiconductor substrate, the n-channel MOSFET is formed in a p-type well region of the semiconductor substrate, and the p-channel MOSFET is formed in an n-type well region of the semiconductor substrate.
    Type: Grant
    Filed: April 6, 1993
    Date of Patent: June 14, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Teruo Uemura, Naoki Hanada
  • Patent number: 5223451
    Abstract: An n-channel MOSFET, a p-channel MOSFET and a nonvolatile memory cell are provided for the same semiconductor substrate. The nonvolatile memory cell is formed on the semiconductor substrate, the n-channel MOSFET is formed in a p-type well region of the semiconductor substrate, and the p-channel MOSFET is formed in an n-type well region of the semiconductor substrate.
    Type: Grant
    Filed: November 19, 1992
    Date of Patent: June 29, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Teruo Uemura, Naoki Hanada
  • Patent number: 5200636
    Abstract: An E.sup.2 PROM and an EPROM are formed on the same substrate. An E.sup.2 PROM memory cell has a floating gate and a control gate. A tunnel insulating film is formed between the floating gate and source/drain regions, thereby constituting a memory cell of an "FLOTOX" type. An EPROM memory cell has a floating gate and a control gate, thus constituting a memory cell of an "SAMOS" type.
    Type: Grant
    Filed: October 10, 1990
    Date of Patent: April 6, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Teruo Uemura, Takahide Mizutani, Naoki Hanada, Tatsuo Mori, Kazuyoshi Shinada
  • Patent number: 5158902
    Abstract: The present invention discloses a logic semiconductor device having a non-volatile memory in which a memory cell portion and a logic circuit portion are formed on a single semiconductor substrate, and a floating gate of the memory cell portion and a gate of the logic circuit portion are made of different materials, and a method of manufacturing the same.
    Type: Grant
    Filed: January 29, 1991
    Date of Patent: October 27, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Naoki Hanada
  • Patent number: 5094967
    Abstract: A method for manufacturing a semiconductor substrate device having a non-volatile memory cell region and a logic region including MOS transistors. A first insulating film and a first electrode layer are formed on a semiconductor substrate. Only those portions of the first insulating film and first electrode layer which are located in the logic region are removed, without removing those portions of the first insulating film and first electrode layer which are located in the non-volatile memory cell region. A sacrificial film is deposited for insulation over the entire surface of the memory cell region and logic region, and then a resist film is coated on the sacrificial film. Subsequently, impurity ions are implanted into a desired channel region located in the logic region. The resist film and sacrificial film are removed, and thereafter a second insulating film and a second electrode layer are formed.
    Type: Grant
    Filed: December 3, 1990
    Date of Patent: March 10, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyoshi Shinada, Masayuki Yoshida, Takahide Mizutani, Naoki Hanada