Patents by Inventor Naoki Il

Naoki Il has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11949380
    Abstract: A method of manufacturing an oscillator including housing a first resonator and a first integrated circuit device configured to oscillate the first resonator in a first container to manufacture the first oscillator, and housing a second resonator and a second integrated circuit device configured to oscillate the second resonator in a second container to manufacture the second oscillator, wherein the first integrated circuit device includes a first oscillation circuit configured to oscillate the first resonator to output a first oscillation signal, and no PLL circuit, the second integrated circuit device includes a second oscillation circuit configured to oscillate the second resonator to output a second oscillation signal, and a PLL circuit to which the second oscillation signal is input, and which is configured to output a third oscillation signal, and the first container and the second container are containers same in type.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: April 2, 2024
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Naoki Il, Yosuke Itasaka
  • Patent number: 11854957
    Abstract: The integrated circuit device includes: a pad that has a shape having a longitudinal direction and a lateral direction; a circuit that overlaps the pad in a plan view, and that is electrically coupled to the pad; a lead-out wiring that is led out from an outer edge on a longitudinal side of the pad along the lateral direction of the pad; and a via group that electrically couples the lead-out wiring and a wiring of the circuit and that does not overlap the pad in the plan view.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: December 26, 2023
    Inventors: Naoki Il, Yosuke Itasaka
  • Patent number: 11519790
    Abstract: Provided is a temperature sensor including a bipolar transistor, a resistor, and a variable resistance circuit. The resistor is provided between a first node coupled to a base node of the bipolar transistor and a collector node of the bipolar transistor. The variable resistance circuit is provided between an emitter node of the bipolar transistor and a ground node.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: December 6, 2022
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Takashi Nomiya, Mitsuaki Sawada, Naoki Il
  • Patent number: 11115029
    Abstract: An integrated circuit device includes a temperature sensor, a heat generation source circuit serving as a heat generation source, a pad for external coupling, and a capacitor having the MIM structure in which one electrode is electrically coupled to the pad for external coupling. In a plan view orthogonal to the substrate on which a circuit element is formed, the capacitor having the MIM structure and the temperature sensor overlap.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: September 7, 2021
    Inventors: Yosuke Itasaka, Naoki Il, Takashi Nomiya
  • Patent number: 11095250
    Abstract: The circuit device includes a current generation circuit and a current-voltage conversion circuit. The current generation circuit generates a temperature compensation current based on a temperature detection voltage from the temperature sensor and temperature compensation data. The current-voltage conversion circuit converts the temperature compensation current into the temperature compensation voltage. The current generation circuit performs a fine adjustment of the temperature compensation current based on lower bits of the temperature compensation data, and performs a coarse adjustment of the temperature compensation current based on higher bits of the temperature compensation data.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: August 17, 2021
    Inventors: Naoki Il, Takashi Nomiya, Mitsuaki Sawada
  • Patent number: 11038463
    Abstract: An integrated circuit device includes a first pad and a second pad electrically coupled to one end and the other end of a resonator, an oscillation circuit that is electrically coupled to the first pad and the second pad and generates an oscillation signal by causing the resonator to oscillate, and an output circuit that outputs a clock signal based on the oscillation signal. The oscillation circuit is disposed along a first side of the integrated circuit device among the first side, a second side that intersects the first side, a third side that is an opposite side of the first side, and a fourth side that is an opposite side of the second side. The first pad and the second pad are disposed in the oscillation circuit along the first side in a plan view, and the output circuit is disposed along the second side.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: June 15, 2021
    Inventors: Mitsuaki Sawada, Naoki Il, Yosuke Itasaka
  • Patent number: 9568315
    Abstract: A detection device includes a drive circuit of a physical quantity transducer, a synchronization signal output circuit, and a detection circuit that performs detection of a physical quantity signal based on a physical quantity. The synchronization signal output circuit includes a delay locked loop (DLL) circuit that includes: a delay control circuit that outputs a delay control signal and a delay circuit that includes a plurality of delay units in which a delay time is controlled by the delay control signal; an adjustment circuit that includes at least one delay unit in which a delay time is controlled by the delay control signal, and outputs a signal obtained by delaying an input signal based on the output signal from the drive circuit to the DLL circuit; and an output circuit that outputs the synchronization signal based on multi-phase clock signals from the DLL circuit.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: February 14, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Naoki Il, Katsuhiko Maki, Takashi Kurashina
  • Patent number: 7646381
    Abstract: An integrated circuit device includes: first through fourth terminals arranged in order in which the first terminal and the fourth terminal are arranged in line symmetry with respect to a center axis of the first through fourth terminals, and the second terminal and the third terminal are arranged in line symmetry with respect to the center axis; a first receiving circuit coupled to the first and second terminals, the first receiving circuit receiving one of a first differential signal pair and a second differential signal pair; a second receiving circuit coupled to the third and fourth terminals, the second receiving circuit receiving the first differential signal pair when the first receiving circuit receives the second differential signal pair and the second differential signal pair when the first receiving circuit receives the first differential signal pair; a first selector selecting one of a first signal and a second signal obtained by inverting the first signal that are output from the first receiving
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: January 12, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Fumikazu Komatsu, Naoki Il