Patents by Inventor Naoki Isoda
Naoki Isoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240036492Abstract: A driving device is provided. The driving device includes a plurality of load blocks each including a load element, a plurality of driving circuits configured to drive the plurality of load blocks, and a connection circuit configured to connect the plurality of load blocks to the plurality of driving circuits, respectively. The connection circuit is configured to switch a connection combination of each of the plurality of load blocks and each of the plurality of driving circuits.Type: ApplicationFiled: July 6, 2023Publication date: February 1, 2024Inventors: NAOKI ISODA, MIZUKI NAGASAKI
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Patent number: 11824532Abstract: A level shift circuit includes: a first transistor connected to ground and having a control terminal; a second transistor connected to the ground and having a control terminal connected to the a terminal of the first transistor; a pull-up circuit connected to a power source and also connected to the first terminal of the first transistor, and having a current mirror circuit constituted by two transistors; a third transistor having a first terminal connected to the first terminal of the first transistor, a second terminal connected to the power source, and a control terminal connected to a first terminal of the second transistor; and a fourth transistor having a first terminal connected to the first terminal of the second transistor, a second terminal connected to the power source, and a control terminal connected to the first terminal of the first transistor.Type: GrantFiled: September 28, 2022Date of Patent: November 21, 2023Assignee: Canon Kabushiki KaishaInventors: Taro Muraki, Naoki Isoda
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Patent number: 11652940Abstract: There is provide a photoelectric conversion device. In a first mode, a control unit performs control such that a signal output from each of a plurality of pixels is held in a corresponding holding unit. In a second mode, the control unit performs control of outputting a signal from the holding unit corresponding to a pixel in a first column and control of holding a signal based on a pixel in the first column in the holding unit corresponding to a pixel in a second column in parallel in the same period.Type: GrantFiled: March 8, 2022Date of Patent: May 16, 2023Assignee: CANON KABUSHIKI KAISHAInventors: Tatsuya Ryoki, Naoki Isoda
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Publication number: 20230101695Abstract: A level shift circuit includes: a first transistor connected to ground and having a control terminal; a second transistor connected to the ground and having a control terminal connected to the a terminal of the first transistor; a pull-up circuit connected to a power source and also connected to the first terminal of the first transistor, and having a current mirror circuit constituted by two transistors; a third transistor having a first terminal connected to the first terminal of the first transistor, a second terminal connected to the power source, and a control terminal connected to a first terminal of the second transistor; and a fourth transistor having a first terminal connected to the first terminal of the second transistor, a second terminal connected to the power source, and a control terminal connected to the first terminal of the first transistor.Type: ApplicationFiled: September 28, 2022Publication date: March 30, 2023Inventors: Taro Muraki, Naoki Isoda
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Publication number: 20220294922Abstract: There is provide a photoelectric conversion device. In a first mode, a control unit performs control such that a signal output from each of a plurality of pixels is held in a corresponding holding unit. In a second mode, the control unit performs control of outputting a signal from the holding unit corresponding to a pixel in a first column and control of holding a signal based on a pixel in the first column in the holding unit corresponding to a pixel in a second column in parallel in the same period.Type: ApplicationFiled: March 8, 2022Publication date: September 15, 2022Inventors: Tatsuya Ryoki, Naoki Isoda
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Patent number: 10894403Abstract: An apparatus includes a substrate, a transistor provided on the substrate and connected to a first terminal supplied with a first voltage, an anti-fuse element provided on the substrate and connected between the transistor and a second terminal supplied with a second voltage, a first resistive element provided on the substrate and connected in parallel to the anti-fuse element and between the transistor and the second terminal, and an adjusting unit provided on the substrate and configured to function so as to reduce an influence of variation in resistance of the first resistive element in reading out of information from the anti-fuse element.Type: GrantFiled: March 21, 2018Date of Patent: January 19, 2021Assignee: CANON KABUSHIKI KAISHAInventors: Kazunari Fujii, Naoki Isoda, Toshio Negishi, Wataru Endo
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Patent number: 10652499Abstract: An image capturing apparatus includes a first chip and a second chip. The first chip includes a plurality of pixels. The second chip is stacked on the first chip and includes a plurality of signal processing circuits arranged in a two-dimensional form. Each signal processing circuit includes a first selection circuit, a plurality of amplifier circuits, and an analog-to-digital conversion unit. The first selection circuit includes a plurality of input nodes, a plurality of output nodes, and is configured such that a signal output from a pixel and input to one of the plurality of input nodes is selectively output to one of the plurality of output nodes. The plurality of amplifier circuits respectively are connected to the plurality of output nodes of the first selection circuit. The analog-to-digital conversion unit is configured to convert a plurality of output signals output from the plurality of amplifier circuits.Type: GrantFiled: September 26, 2018Date of Patent: May 12, 2020Assignee: CANON KABUSHIKI KAISHAInventors: Naoki Isoda, Hirofumi Totsuka, Daisuke Yoshida
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Publication number: 20190104271Abstract: An image capturing apparatus includes a first chip and a second chip. The first chip includes a plurality of pixels. The second chip is stacked on the first chip and includes a plurality of signal processing circuits arranged in a two-dimensional form. Each signal processing circuit includes a first selection circuit, a plurality of amplifier circuits, and an analog-to-digital conversion unit. The first selection circuit includes a plurality of input nodes, a plurality of output nodes, and is configured such that a signal output from a pixel and input to one of the plurality of input nodes is selectively output to one of the plurality of output nodes. The plurality of amplifier circuits respectively are connected to the plurality of output nodes of the first selection circuit. The analog-to-digital conversion unit is configured to convert a plurality of output signals output from the plurality of amplifier circuits.Type: ApplicationFiled: September 26, 2018Publication date: April 4, 2019Inventors: Naoki Isoda, Hirofumi Totsuka, Daisuke Yoshida
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Publication number: 20180281390Abstract: An apparatus includes a substrate, a transistor provided on the substrate and connected to a first terminal supplied with a first voltage, an anti-fuse element provided on the substrate and connected between the transistor and a second terminal supplied with a second voltage, a first resistive element provided on the substrate and connected in parallel to the anti-fuse element and between the transistor and the second terminal, and an adjusting unit provided on the substrate and configured to function so as to reduce an influence of variation in resistance of the first resistive element in reading out of information from the anti-fuse element.Type: ApplicationFiled: March 21, 2018Publication date: October 4, 2018Inventors: Kazunari Fujii, Naoki Isoda, Toshio Negishi, Wataru Endo
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Patent number: 9942494Abstract: A current-voltage converter, comprising an operational amplifier having an input terminal and an output terminal, a first resistor portion connected to the input terminal, and a second resistor portion provided between the input and output terminals, the input terminal and the first and second resistor portions being connected to each other, the first resistor portion being connected to a current source on a side opposite to the input terminal, the second resistor portion including a diode, the first resistor portion having a first resistance value when a current of a first current amount is supplied to the first resistor portion, and having a second resistance value smaller than the first resistance value when a current of a second current amount larger than the first current amount is supplied to the first resistor portion.Type: GrantFiled: March 6, 2017Date of Patent: April 10, 2018Assignee: CANON KABUSHIKI KAISHAInventor: Naoki Isoda
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Publication number: 20170280081Abstract: A current-voltage converter, comprising an operational amplifier having an input terminal and an output terminal, a first resistor portion connected to the input terminal, and a second resistor portion provided between the input and output terminals, the input terminal and the first and second resistor portions being connected to each other, the first resistor portion being connected to a current source on a side opposite to the input terminal, the second resistor portion including a diode, the first resistor portion having a first resistance value when a current of a first current amount is supplied to the first resistor portion, and having a second resistance value smaller than the first resistance value when a current of a second current amount larger than the first current amount is supplied to the first resistor portion.Type: ApplicationFiled: March 6, 2017Publication date: September 28, 2017Inventor: Naoki Isoda
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Patent number: 9746865Abstract: Provided is a current-to-voltage conversion circuit, including: an input/output node configured to input a current signal including a direct current component and an alternating current component, and to output a voltage based on the current signal; an amplification unit configured to input the voltage of the input/output node; an extraction unit configured to output a voltage based on a direct current component of a voltage output from the amplification unit; a first current supply unit configured to supply a current based on the voltage output from the extraction unit to the input/output node; and a second current supply unit configured to supply a current based on the alternating current component of the current signal to the input/output node. The current supplied by the second current supply unit corresponds to a difference between a current of the current signal and the current supplied by the first current supply unit.Type: GrantFiled: April 5, 2016Date of Patent: August 29, 2017Assignee: CANON KABUSHIKI KAISHAInventor: Naoki Isoda
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Patent number: 9712159Abstract: A differential driving circuit includes a source current source, a sink current source, an H-bridge circuit, an error detector unit and a circuit network. The H-bridge circuit is connected to the source current source and the sink current source, that has a first output terminal and a second output terminal, and that generates differential output from the first output terminal and the second output terminal. The error detector unit adjusts a common mode voltage at the first output terminal and the second output terminal of the H-bridge circuit by controlling at least one of the source current source and the sink current source. The circuit network is configured by resistors and capacitors connected to the first output terminal and the second output terminal of the H-bridge circuit.Type: GrantFiled: December 9, 2014Date of Patent: July 18, 2017Assignee: CANON KABUSHIKI KAISHAInventor: Naoki Isoda
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Publication number: 20160308496Abstract: Provided is a current-to-voltage conversion circuit, including: an input/output node configured to input a current signal including a direct current component and an alternating current component, and to output a voltage based on the current signal; an amplification unit configured to input the voltage of the input/output node; an extraction unit configured to output a voltage based on a direct current component of a voltage output from the amplification unit; a first current supply unit configured to supply a current based on the voltage output from the extraction unit to the input/output node; and a second current supply unit configured to supply a current based on the alternating current component of the current signal to the input/output node. The current supplied by the second current supply unit corresponds to a difference between a current of the current signal and the current supplied by the first current supply unit.Type: ApplicationFiled: April 5, 2016Publication date: October 20, 2016Inventor: Naoki Isoda
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Publication number: 20150188537Abstract: A differential driving circuit includes a source current source, a sink current source, an H-bridge circuit, an error detector unit and a circuit network. The H-bridge circuit is connected to the source current source and the sink current source, that has a first output terminal and a second output terminal, and that generates differential output from the first output terminal and the second output terminal. The error detector unit adjusts a common mode voltage at the first output terminal and the second output terminal of the H-bridge circuit by controlling at least one of the source current source and the sink current source. The circuit network is configured by resistors and capacitors connected to the first output terminal and the second output terminal of the H-bridge circuit.Type: ApplicationFiled: December 9, 2014Publication date: July 2, 2015Inventor: Naoki Isoda
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Patent number: 8174317Abstract: A fully-differential amplifier circuit comprises a differential amplifier configured to differentially amplify first and second input signals serving as an input differential pair to generate a pair of first and second intermediate signals, first and second class AB amplifiers configured to amplify the first and second intermediate signals to generate first and second output signals, wherein the first and second output signals serve as an output differential pair, the first class AB amplifier amplifies the first intermediate signal with reference to a reference voltage adjusted by a first feedback signal that is a common mode component of the first output signal and the second output signal, and the second class AB amplifier amplifies the second intermediate signal with reference to a reference voltage adjusted by a second feedback signal that is a common mode component of the first output signal and the second output signal.Type: GrantFiled: May 7, 2010Date of Patent: May 8, 2012Assignee: Canon Kabushiki KaishaInventor: Naoki Isoda
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Publication number: 20100289582Abstract: A fully-differential amplifier circuit comprises a differential amplifier configured to differentially amplify first and second input signals serving as an input differential pair to generate a pair of first and second intermediate signals, first and second class AB amplifiers configured to amplify the first and second intermediate signals to generate first and second output signals, wherein the first and second output signals serve as an output differential pair, the first class AB amplifier amplifies the first intermediate signal with reference to a reference voltage adjusted by a first feedback signal that is a common mode component of the first output signal and the second output signal, and the second class AB amplifier amplifies the second intermediate signal with reference to a reference voltage adjusted by a second feedback signal that is a common mode component of the first output signal and the second output signal.Type: ApplicationFiled: May 7, 2010Publication date: November 18, 2010Applicant: CANON KABUSHIKI KAISHAInventor: Naoki Isoda
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Patent number: 7755411Abstract: A DC current reduction circuit of the present invention that reduces a DC component in an output current of a current output element in which an AC current and a DC current are superimposed includes a low-pass filter for extracting a current component of a frequency lower than a cutoff frequency from the output current and a reduction unit that reduces the extracted current component from the output current. The low-pass filter has a frequency changing unit that changes the cutoff frequency from higher to lower as a continuous function over time.Type: GrantFiled: February 23, 2009Date of Patent: July 13, 2010Assignee: Canon Kabushiki KaishaInventor: Naoki Isoda
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Publication number: 20090212840Abstract: A DC current reduction circuit of the present invention that reduces a DC component in an output current of a current output element in which an AC current and a DC current are superimposed includes a low-pass filter for extracting a current component of a frequency lower than a cutoff frequency from the output current and a reduction unit that reduces the extracted current component from the output current. The low-pass filter has a frequency changing unit that changes the cutoff frequency from higher to lower as a continuous function over time.Type: ApplicationFiled: February 23, 2009Publication date: August 27, 2009Applicant: CANON KABUSHIKI KAISHAInventor: Naoki Isoda