Abstract: A semiconductor device may include a channel including an oxide semiconductor layer in a through hole; a first electrode in a first side of the through hole, the first electrode connected to a first side of the channel; a second electrode in a second side of the through hole and connected to a second side of the channel; and an insulating layer having a groove in which the second electrode is accommodated. The insulating layer includes first and second insulating films. The groove extends in a thickness direction. At least a part of the groove has a depth where at least a part of the groove penetrates through the first insulating film and reaches the second insulating film. The second electrode includes a stack of a metal film and a conductive film. The metal film is in contact with at least an inner bottom surface of the groove.

Abstract: According to one embodiment, a cell block includes memory cells and select transistors. The memory cells correspond are connected in parallel between a local source line and a local bit line. The select transistor is connected between the local bit line and a bit line. The memory cell includes a cell transistor and a resistance change element. A gate of the cell transistor is connected to a word line. The resistance change element is connected to the cell transistor in series between the local source line and the local bit line. Each cell block is configured as a columnar structure penetrating a plurality of conductive films functioning as word lines. The select transistor and the local bit line are connected at a contact portion formed of a material different from a material of the local bit line.

Abstract: To facilitate management of the entirety of one or a plurality of clinical laboratories. This information processing apparatus is used in management of a clinical laboratory in which an analyzer configured to analyze specimens is installed. The information processing apparatus includes: a communication section configured to communicate with a terminal operable by a user; and a controller configured to control display of the terminal via the communication section. On the basis of information collected from a plurality of analyzers installed in one or a plurality of clinical laboratories and from apparatuses relevant to the analyzers, the controller causes the terminal to display a screen including an index that indicates a status of the entirety of the one or the plurality of clinical laboratories. In response to the user selecting the index displayed in the screen, the controller causes the terminal to display the selected index so as to be divided in a plurality of categories.

Abstract: To facilitate management of the entirety of one or a plurality of clinical laboratories. This information processing apparatus is used in management of a clinical laboratory in which an analyzer configured to analyze specimens is installed. The information processing apparatus includes: a communication section configured to communicate with a terminal operable by a user; and a controller configured to control display of the terminal via the communication section. On the basis of information collected from a plurality of analyzers installed in one or a plurality of clinical laboratories and from apparatuses relevant to the analyzers, the controller causes the terminal to display a screen including an index that indicates a status of the entirety of the one or the plurality of clinical laboratories. In response to the user selecting the index displayed in the screen, the controller causes the terminal to display the selected index so as to be divided in a plurality of categories.

Abstract: To facilitate management of the entirety of one or a plurality of clinical laboratories. This information processing apparatus is used in management of a clinical laboratory in which an analyzer configured to analyze specimens is installed. The information processing apparatus includes: a communication section configured to communicate with a terminal operable by a user; and a controller configured to control display of the terminal via the communication section. On the basis of information collected from a plurality of analyzers installed in one or a plurality of clinical laboratories and from apparatuses relevant to the analyzers, the controller causes the terminal to display a screen including an index that indicates a status of the entirety of the one or the plurality of clinical laboratories. In response to the user selecting the index displayed in the screen, the controller causes the terminal to display the selected index so as to be divided in a plurality of categories.

Abstract: To facilitate management of the entirety of one or a plurality of clinical laboratories. This information processing apparatus is used in management of a clinical laboratory in which an analyzer configured to analyze specimens is installed. The information processing apparatus includes: a communication section configured to communicate with a terminal operable by a user; and a controller configured to control display of the terminal via the communication section. On the basis of information collected from a plurality of analyzers installed in one or a plurality of clinical laboratories and from apparatuses relevant to the analyzers, the controller causes the terminal to display a screen including an index that indicates a status of the entirety of the one or the plurality of clinical laboratories. In response to the user selecting the index displayed in the screen, the controller causes the terminal to display the selected index so as to be divided in a plurality of categories.

Abstract: To facilitate management of the entirety of one or a plurality of clinical laboratories. This information processing apparatus is used in management of a clinical laboratory in which an analyzer configured to analyze specimens is installed. The information processing apparatus includes: a communication section configured to communicate with a terminal operable by a user; and a controller configured to control display of the terminal via the communication section. On the basis of information collected from a plurality of analyzers installed in one or a plurality of clinical laboratories and from apparatuses relevant to the analyzers, the controller causes the terminal to display a screen including an index that indicates a status of the entirety of the one or the plurality of clinical laboratories. In response to the user selecting the index displayed in the screen, the controller causes the terminal to display the selected index so as to be divided in a plurality of categories.

Abstract: An endless flat belt includes an inner rubber layer 1, a cord core 11 buried in the inner rubber layer 1 and spirally wound at a predetermined pitch in a width direction of the belt, and a reinforcement fabric 2 stuck to the inner rubber layer 1. The cord core comprises polyamide fiber. Opposite ends of the reinforcement fabric 2 are connected with each other into an endless form by adhesion or sewing. A surface rubber layer 3 is stuck to a surface of the reinforcement fabric 2 which is opposite a surface thereof stuck to the inner rubber layer 1.

Abstract: To facilitate management of the entirety of one or a plurality of clinical laboratories. This information processing apparatus is used in management of a clinical laboratory in which an analyzer configured to analyze specimens is installed. The information processing apparatus includes: a communication section configured to communicate with a terminal operable by a user; and a controller configured to control display of the terminal via the communication section. On the basis of information collected from a plurality of analyzers installed in one or a plurality of clinical laboratories and from apparatuses relevant to the analyzers, the controller causes the terminal to display a screen including an index that indicates a status of the entirety of the one or the plurality of clinical laboratories. In response to the user selecting the index displayed in the screen, the controller causes the terminal to display the selected index so as to be divided in a plurality of categories.

Abstract: An endless flat belt includes an inner rubber layer 1, a cord core 11 buried in the inner rubber layer 1 and spirally wound at a predetermined pitch in a width direction of the belt, and a reinforcement fabric 2 stuck to the inner rubber layer 1. The cord core comprises polyamide fiber. Opposite ends of the reinforcement fabric 2 are connected with each other into an endless form by adhesion or sewing. A surface rubber layer 3 is stuck to a surface of the reinforcement fabric 2 which is opposite a surface thereof stuck to the inner rubber layer 1.

Abstract: A semiconductor device including a first isolation region dividing a semiconductor substrate into first regions; memory cells each including a tunnel insulating film, a charge storing layer, an interelectrode insulating film, and a control gate electrode above the first region; a second isolation region dividing the substrate into second regions in a peripheral circuit region; and a peripheral circuit transistor including a gate insulating film and a gate electrode above the second region. The first isolation region includes a first trench, a first element isolation insulating film filled in a bottom portion of the first trench, and a first gap formed between the first element isolation insulating film and the interelectrode insulating film. The second isolation region includes a second trench and a second element isolation insulating film filled in the second trench. The first and the second element isolation insulating films have different properties.

Abstract: In general, according to one embodiment, a nonvolatile semiconductor memory device includes a memory cell region and a peripheral region. The memory cell region includes first element isolation regions, first semiconductor regions, a first gate insulating film, a charge storage layer, a second gate insulating film, and a control gate electrode. The first element isolation regions separate a semiconductor layer and include a first insulating film. The first semiconductor regions are separated by the first element isolation regions. The peripheral region includes a second element isolation region a second insulating film. Each of the first element isolation regions includes a first and a second portion. A step is present between the first and the second portion. At least part of a side surface and a lower end of the second element isolation region are surrounded by the semiconductor layer.

Abstract: According to one embodiment, a semiconductor memory device includes: a first semiconductor region extending in a first direction; second semiconductor regions extending in a second direction crossing the first direction from the first semiconductor region and arranged in the first direction; and a first element isolation region provided between the second semiconductor regions. A width of the first semiconductor region in the second direction is wider than a width of the second semiconductor region in the first direction.

Abstract: Plural first charge accumulation layers are arranged on a first gate-insulating film, and divided in the first direction and the second direction. Plural second charge accumulation layers are arranged on a second gate-insulating film and divided in the first direction and the second direction. An intermediate insulating film is arranged on the side surface of the first charge accumulation layers and on the side surface of the second charge accumulation layers. The control electrode includes a side-surface portion, which is arranged on the side surface of the intermediate insulating film, extends in the second direction, and faces via the intermediate insulating film to the side surface of the first charge accumulation layer and the side surface of the second charge accumulation layer, and a pad portion arranged monolithically on the lower portion of the side-surface portion and having a width larger than the film thickness of the side-surface portion.

Abstract: In general, according to one embodiment, a nonvolatile semiconductor memory device includes a memory cell region and a peripheral region. The memory cell region includes first element isolation regions, first semiconductor regions, a first gate insulating film, a charge storage layer, a second gate insulating film, and a control gate electrode. The first element isolation regions separate a semiconductor layer and include a first insulating film. The first semiconductor regions are separated by the first element isolation regions. The peripheral region includes a second element isolation region a second insulating film. Each of the first element isolation regions includes a first and a second portion. A step is present between the first and the second portion. At least part of a side surface and a lower end of the second element isolation region are surrounded by the semiconductor layer.

Abstract: A semiconductor device including a first isolation region dividing a semiconductor substrate into first regions; memory cells each including a tunnel insulating film, a charge storing layer, an interelectrode insulating film, and a control gate electrode above the first region; a second isolation region dividing the substrate into second regions in a peripheral circuit region; and a peripheral circuit transistor including a gate insulating film and a gate electrode above the second region. The first isolation region includes a first trench, a first element isolation insulating film filled in a bottom portion of the first trench, and a first gap formed between the first element isolation insulating film and the interelectrode insulating film. The second isolation region includes a second trench and a second element isolation insulating film filled in the second trench. The first and the second element isolation insulating films have different properties.

Abstract: A method of manufacturing a nonvolatile semiconductor storage device includes filling an element isolation trench with a sacrificial film; etching a laminate of films to form a plurality of first and second gate electrodes such that the first gate electrodes are disposed in a first region, and the second gate electrodes are disposed in a second region adjacent to the first region; removing the sacrificial film; forming a resist having an opening in the first region; forming a barrier insulating film so as to at least cover an edge of the opening; etching back the barrier insulating film and thereafter removing the resist film; forming an insulating film to form an unfilled gap in the element isolation trench located below the second gate electrode, the second region, and the third region.

Abstract: In a gamma corrector for handling gamma correction data used in performing gamma correction on image data represented by plural component colors for each of the component colors, a storage stores common data employed in common in predetermined gamma correction data in one-to-one correspondence to the plural component colors when generating final gamma-corrected image data. Another storage stores, for each component color, reproduction data represented by removing the common data from the final gamma-corrected image data of each component color in the predetermined gamma correction data. A data processor distributes input image data of each component color to both common and reproduction data to thereby generate the address data. A data coupler generates the common and reproduction data according to address data from the storages and employs the generated common and reproduction data to generate final gamma-corrected image data for image data of the component colors.

Abstract: According to one embodiment, a plurality of memory cells are provided on a semiconductor substrate. In each memory cell, a control gate electrode is provided on a charge accumulation layer with an inter-electrode insulation film interposed between the control gate electrode and the charge accumulation layer, an air gap is provided between the charge accumulation layers adjacent to each other in a word line direction, and an insulation film disposed below the inter-electrode insulation film is divided into an upper part and a lower part by the air gap.

Abstract: According to one embodiment, a memory cell includes a charge storage layer. A first air gap is provided between charge storage layers adjacent in a word line direction. A second air gap is provided between charge storage layers adjacent in a bit line direction.