Patents by Inventor Naoki KAMIHAMA

Naoki KAMIHAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11731236
    Abstract: A method for selecting a template assembly includes: preparing a template assembly in which a template is concentrically attached on a base ring or a base plate having a larger outer diameter than the template, the template having a back pad to hold a workpiece back surface and a retainer ring positioned on the back pad and to hold an edge portion of the workpiece; non-destructively measuring a height position distribution of the retainer ring and the back pad on the template side of the template assembly, where an outer peripheral edge surface of the base ring or the base plate serves as a reference surface; calculating a flatness of the retainer ring and an average amount of step differences between the retainer ring and the back pad from the measured height position distribution; and selecting the template assembly based on the flatness and the average amount of step differences.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: August 22, 2023
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazuya Sato, Naoki Kamihama, Hiromasa Hashimoto
  • Patent number: 10913137
    Abstract: A method for polishing a silicon wafer, including: a first polishing step of polishing a silicon wafer surface by bringing the wafer held by a polishing head into sliding contact with a polishing pad attached to a turn table while supplying an aqueous alkaline solution containing abrasive grains onto the polishing pad, and a second polishing step of polishing the silicon wafer surface by bringing the wafer into sliding contact with the polishing pad while supplying an aqueous alkaline solution containing a polymer without containing abrasive grains onto the polishing pad, wherein the surface temperature of the polishing pad is controlled such that the surface temperature of the polishing pad in the second polishing step is higher than the surface temperature of the polishing pad in the first polishing step by 2° C. or more. This successfully achieves both of higher flatness and reduction in surface roughness.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: February 9, 2021
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Yuki Tanaka, Naoki Kamihama
  • Patent number: 10744615
    Abstract: The present invention provides a method for polishing a wafer including, after unloading and before loading to hold a next wafer to be polished: measurement to measure a depth PDt of a concave portion of a template after taking out a polished wafer; calculation to calculate a difference ?PD between the measured depth PDt of the concave portion and a depth PD0 of the concave portion of the template before being used for polishing; and adjustment to adjust polishing conditions for a next wafer to be polished in accordance with the calculated difference ?PD. Consequently, there are provided the method for polishing a wafer and a polishing apparatus which enable adjusting a fluctuation in flatness of each wafer caused due to a fluctuation in numerical value of a pocket depth of a template.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: August 18, 2020
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazuya Sato, Hiromasa Hashimoto, Naoki Kamihama
  • Publication number: 20200114488
    Abstract: A method for polishing a silicon wafer, including: a first polishing step of polishing a silicon wafer surface by bringing the wafer held by a polishing head into sliding contact with a polishing pad attached to a turn table while supplying an aqueous alkaline solution containing abrasive grains onto the polishing pad, and a second polishing step of polishing the silicon wafer surface by bringing the wafer into sliding contact with the polishing pad while supplying an aqueous alkaline solution containing a polymer without containing abrasive grains onto the polishing pad, wherein the surface temperature of the polishing pad is controlled such that the surface temperature of the polishing pad in the second polishing step is higher than the surface temperature of the polishing pad in the first polishing step by 2° C. or more. This successfully achieves both of higher flatness and reduction in surface roughness.
    Type: Application
    Filed: March 16, 2018
    Publication date: April 16, 2020
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Yuki TANAKA, Naoki KAMIHAMA
  • Publication number: 20190126431
    Abstract: A method for selecting a template assembly includes: preparing a template assembly in which a template is concentrically attached on a base ring or a base plate having a larger outer diameter than the template, the template having a back pad to hold a workpiece back surface and a retainer ring positioned on the back pad and to hold an edge portion of the workpiece; non-destructively measuring a height position distribution of the retainer ring and the back pad on the template side of the template assembly, where an outer peripheral edge surface of the base ring or the base plate serves as a reference surface; calculating a flatness of the retainer ring and an average amount of step differences between the retainer ring and the back pad from the measured height position distribution; and selecting the template assembly based on the flatness and the average amount of step differences.
    Type: Application
    Filed: March 14, 2017
    Publication date: May 2, 2019
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazuya SATO, Naoki KAMIHAMA, Hiromasa HASHIMOTO
  • Publication number: 20180290261
    Abstract: The present invention provides a method for polishing a wafer including, after unloading and before loading to hold, a next wafer to be polished: measurement to measure a depth PDt of a concave portion of a template after taking out a polished wafer; calculation to calculate a difference ?PD between the measured depth PDt of the concave portion and a depth PD0 of the concave portion of the template before being used for polishing; and adjustment to adjust polishing conditions for a next wafer to be polished in accordance with the calculated difference ?PD. Consequently, there are provided the method for polishing a wafer and a polishing apparatus which enable adjusting a fluctuation in flatness of each wafer caused due to a fluctuation in numerical value of a pocket depth of a template.
    Type: Application
    Filed: October 17, 2016
    Publication date: October 11, 2018
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazuya SATO, Hiromasa HASHIMOTO, Naoki KAMIHAMA