Patents by Inventor Naoki Kashimura

Naoki Kashimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5731845
    Abstract: A two-dimensional contour enhancement is performed along a plurality of lines on a two-dimensional frequency characteristic chart, the line intersecting with each other at middle points between successive color cross generating regions and not passing through an origin. Then, the contour enhancement can be carried out in a frequency region of 3-4 MHz in which a visual effect of contour enhancement appears most effective, while the enhancement in the cross color generating regions can be suppressed.
    Type: Grant
    Filed: April 29, 1996
    Date of Patent: March 24, 1998
    Assignee: Ikegami Tsushinki Co., Ltd.
    Inventor: Naoki Kashimura
  • Patent number: 5406329
    Abstract: A solid state image pickup apparatus includes a solid state image pickup device for receiving an optical image of an object and generating an electrical image signal representing the optical image of the object in synchronism with a driving pulse from a driving circuit. A sampling circuit generates a sampled image signal by sampling the electrical image signal read out of the solid state image pickup device with a first sampling pulse from a first pulse circuit synchronized with the driving pulse. An analog-to-digital convertor converts the sampled image signal to a digital image signal with a second sampling pulse from a second pulse circuit. A test signal generator generates a test signal which is synchronized with the driving pulse and alternately changes in level between consecutive pixels. A controller controls the phase of the first sampling pulse and the phase of the second sampling pulse relative to each other by processing the test signal.
    Type: Grant
    Filed: August 2, 1993
    Date of Patent: April 11, 1995
    Assignee: Ikegami Tsushinki Co., Ltd.
    Inventors: Naoki Kashimura, Kazuhiro Kawamura
  • Patent number: 5274756
    Abstract: An outline compensation circuit comprising: a first coefficient multiplier for reducing a level of an image signal by one half and reversing the polarity thereof; a first delay circuit for delaying by 2.tau. the signal from the first coefficient multiplier; a first adder for adding the signal from the first delay circuit to the image signal; a second delay circuit for delaying the signal from the first adder by 2.tau.
    Type: Grant
    Filed: February 18, 1993
    Date of Patent: December 28, 1993
    Assignee: Ikegami Tsushinki Co., Ltd.
    Inventors: Naoki Kashimura, Takamitsu Sakai
  • Patent number: 5157481
    Abstract: A registration correction circuit for a solid-state camera having a plurality of solid-state image pickup elements. One of the color video signals produced from the image pickup elements is selected as a reference signal, and pixel data of the color video signals other than the reference signal are electronically moved so that the pixel data of all the color video signals will agree in their positions. Movement of pixels is carried out by using coordinate transformation and interpolation technique: the coordinate transformation is used to shift the pixels by a multiple of 1-pixel pitch; and the interpolation is used to shift the pixels by less than 1-pixel pitch. The spatial frequency components reduced by the interpolation calculations are adaptively enhanced for each pixel in real time.
    Type: Grant
    Filed: December 18, 1991
    Date of Patent: October 20, 1992
    Assignee: Ikegami Tsushinki Co., Ltd.
    Inventors: Naoki Kashimura, Kazuhiro Ban, Jun Hattori, Yoshiro Aoyagi
  • Patent number: 5103298
    Abstract: An error correction method and circuit for a nonlinear quantization circuit comparing a test signal which is produced from an error correction table by applying an analog reference signal into a nonlinear circuit with reference data that is defined as an output of the error correction table when the nonlinear circuit has no error, and updating the error correction table by the test signal and the reference data when they disagree. The output of the nonlinear circuit is corrected by using the error correction table. The technique is particularly suitable for nonlinear conversion performed by a gamma correction circuit of a color television camera.
    Type: Grant
    Filed: September 7, 1990
    Date of Patent: April 7, 1992
    Assignee: Ikegami Tsushinki Co., Ltd.
    Inventors: Naoki Kashimura, Jun Hattori, Eiji Nakamura