Abstract: A composite filter device includes a piezoelectric substrate, a transmission filter, a reception filter, a first capacitance element, and a second capacitance element. The transmission filter includes a first parallel arm resonator connected to a first reference potential electrode. The reception filter includes a second parallel arm resonator connected to a second reference potential electrode. The first capacitance element is connected between a signal line in the reception filter and the first reference potential electrode. The second capacitance element is connected to the signal line and the second reference potential electrode in the reception filter.

Abstract: Provided are an array communication device that makes phase correction between a plurality of arrays having bi-directional amplifiers possible and a method for controlling the array communication device. This array communication device comprises a plurality of array units that are connected to a common signal processing unit and each comprise an antenna, amplifier, and phase shifter. The array communication device further comprises first-directional couplers that are respectively disposed between the antennas and amplifiers of the array units and divide or combine signals, second-directional couplers that are respectively disposed between the phase shifters of the array units and the signal processing unit and divide or combine signals, and phase comparison means that each receive at least one from among a signal from a first-directional coupler and a signal from a second-directional coupler and a signal serving as a phase reference and carry out phase comparison and correction.

Abstract: A polarized wave shared array antenna 10A includes: planar antennas 11a and 11b, each of which generating two polarized waves of first and second polarized waves orthogonal to each other; feeding points 12a and 12b for generating the first polarized wave, which are provided in the planar antenna 11a, and feeding points 14a and 14b for generating the second polarized wave, which are provided in the planar antenna 11b; and an integrated circuit 20 including transmission and reception units 21a, 21b, 22a, and 22b connected to the respective feeding points 12a, 12b, 14a, and 14b via wirings, in which in a plan view, with respect to an axis A1, the feeding points 12a and 14a, respectively, are disposed symmetrical to the feeding points 12b and 14b, and the transmission and reception units 21a and 22a, respectively, are disposed symmetrical to the transmission and reception units 21b and 22b.

Abstract: A semiconductor device comprises a central processing device, a first logical circuit, and a serial memory interface circuit. The first logical circuit has a first scan chain in which a first scan pattern is set, is configured to suppress a leakage current when the first scan pattern for power saving is set in the first scan chain. The serial memory interface circuit is configured to acquire the first scan pattern for power saving from an external storage device. The leakage current of the first logical circuit is suppressed by transferring the first scan pattern for power saving acquired by the serial memory interface circuit to the first logical circuit and setting the first scan pattern for power saving in the first scan chain under control of the central processing device.

Abstract: In order to enable a reduction in the time required to calibrate the amplitude phase of an antenna device, this processing device is provided with: a setting unit group which performs setting from a predetermined three or more-valued phase value regarding the phase value of a signal received by each of a plurality of antenna elements or a signal transmitted from each of the antenna elements with respect to a calibration signal, on the basis of information extracted from one control information, and derives set signals that are signals on which the setting has been performed; and a computing unit which outputs a correlation value that is a value indicating a correlation between the sum of the set signals and the control information.

Abstract: A polarized wave shared array antenna according to an example embodiment includes: antenna elements 11a and 11b provided adjacent to each other on one surface of an antenna substrate 1, each of which being configured to generate two orthogonal linear polarized waves; feeding points 12a and 12b disposed in a first direction when viewed from each antenna element and feeding points 14a and 14b disposed in a second direction orthogonal to the first direction when viewed from each antenna element; transmission and reception units 21a, 21b, 22a, and 22b that are provided on an integrated circuit on the other surface of the antenna substrate 1 and are respectively connected to the feeding points, in which in a plan view, the feeding points are disposed so as to be arranged on a straight line, and wirings connecting the transmission and transmission units to the corresponding feeding points are equal in length.

Abstract: Provided is a bidirectional amplifier that can be downsized even when performance varies for each of a plurality of amplifying units. The bidirectional amplifier includes: a first amplifying unit configured to amplify a first signal input from a first terminal and output the amplified first signal from a second terminal; a second amplifying unit configured to amplify a second signal input from the second terminal, output the amplified second signal from the first terminal, and including a compensation element and a compensation element compensating for degradation in performance of the first amplifying unit; and a control unit configured to control an operation of the first amplifying unit and an operation of the second amplifying unit.

Abstract: An interference signal generation device includes a first converter configured to perform conversion on a frequency of an input signal based on a center frequency of a frequency band to be interfered, and a second converter configured to further perform conversion on a frequency of an output signal of the first converter based on the center frequency.

Abstract: A phased array antenna apparatus 10 according to an example embodiment includes at least four patch antennas 6 arranged in a two-dimensional array, and a semiconductor IC 1 connected to the patch antennas 6, in which the semiconductor IC 1 includes at least two first input/output terminals 5 through which a transmission/reception signal is input/output between the phased array antenna apparatus and an external apparatus connected to the phased array antenna apparatus, a plurality of second input/output terminals 4 connected to feeding points 8 of the patch antennas 6 through respective feed lines 7, the plurality of second input/output terminals being terminals through which the transmission/reception signal is input/output, and a matrix switch 2 capable of changing a connection relation between the first input/output terminals 5 and the second input/output terminals 4.

Abstract: A communication server device that mediates communication information transmitted and received between a plurality of communication terminals provides people who are participating in a conversation using real-time chat with information that can create a trigger to prompt them to end the conversation.

Abstract: Implemented is a communication with reasonably smooth conversation even between people having different proficiency levels in a common language. Included are a voice recognition unit (14) that acquires a speech rate of a speaker and recognizes a voice on a speech content; and a call voice processing unit (12) that processes a part of a voice recognition result based on a result of comparing the acquired speech rate with a reference speech rate, and transmits a video on which a text character image of the voice recognition result having been processed is superimposed to a communication terminal TM of the speaker.

Abstract: The present invention is provided with: a plurality of antenna units each including a plurality of antenna elements and a partial synthesizer that synthesizes first output signals of the respective antenna elements and outputs a second output signal; a partial power detection means that measures signal intensities of the respective second output signals; a position determination unit that determines the position of a communication device serving as a communication target based on the measured signal intensities of the respective second output signals; a summing synthesizer that synthesizes the second output signals of the plurality of antenna units and outputs a third output signal; and a phase control unit that controls phases of the respective antenna elements such that a main lobe, which is a beam having a maximum signal intensity for the third output signal, is directed to the position of the communication device determined by the position determination unit.

Abstract: A phase adjustment circuit includes: a local frequency band phase shifter that adjusts a phase of a signal in a local signal frequency band and that outputs the adjusted signal; a frequency-converting mixer that receives the adjusted signal and another signal different from the adjusted signal, and that mixes the adjusted signal with the other signal; and a buffer amplifier that is provided between the local frequency band phase shifter and the frequency-converting mixer, and that is capable of amplifying an input power that is to be input to the frequency-converting mixer so that the input power is up to be in an input power range in which an input-output characteristic of power of the frequency-converting mixer is out of a linear region.

Abstract: Provided are an array communication device that makes phase correction between a plurality of arrays having bi-directional amplifiers possible and a method for controlling the array communication device. This array communication device comprises a plurality of array units that are connected to a common signal processing unit and each comprise an antenna, amplifier, and phase shifter. The array communication device further comprises first-directional couplers that are respectively disposed between the antennas and amplifiers of the array units and divide or combine signals, second-directional couplers that are respectively disposed between the phase shifters of the array units and the signal processing unit and divide or combine signals, and phase comparison means that each receive at least one from among a signal from a first-directional coupler and a signal from a second-directional coupler and a signal serving as a phase reference and carry out phase comparison and correction.

Abstract: A phased array antenna apparatus 10 according to an example embodiment includes at least four patch antennas 6 arranged in a two-dimensional array, and a semiconductor IC 1 connected to the patch antennas 6, in which the semiconductor IC 1 includes at least two first input/output terminals 5 through which a transmission/reception signal is input/output between the phased array antenna apparatus and an external apparatus connected to the phased array antenna apparatus, a plurality of second input/output terminals 4 connected to feeding points 8 of the patch antennas 6 through respective feed lines 7, the plurality of second input/output terminals being terminals through which the transmission/reception signal is input/output, and a matrix switch 2 capable of changing a connection relation between the first input/output terminals 5 and the second input/output terminals 4.

Abstract: A polarized wave shared array antenna 10A includes: planar antennas 11a and 11b, each of which generating two polarized waves of first and second polarized waves orthogonal to each other; feeding points 12a and 12b for generating the first polarized wave, which are provided in the planar antenna 11a, and feeding points 14a and 14b for generating the second polarized wave, which are provided in the planar antenna 11b; and an integrated circuit 20 including transmission and reception units 21a, 21b, 22a, and 22b connected to the respective feeding points 12a, 12b, 14a, and 14b via wirings, in which in a plan view, with respect to an axis A1, the feeding points 12a and 14a, respectively, are disposed symmetrical to the feeding points 12b and 14b, and the transmission and reception units 21a and 22a, respectively, are disposed symmetrical to the transmission and reception units 21b and 22b.

Abstract: A semiconductor device comprises a central processing device, a first logical circuit, and a serial memory interface circuit. The first logical circuit has a first scan chain in which a first scan pattern is set, is configured to suppress a leakage current when the first scan pattern for power saving is set in the first scan chain. The serial memory interface circuit is configured to acquire the first scan pattern for power saving from an external storage device. The leakage current of the first logical circuit is suppressed by transferring the first scan pattern for power saving acquired by the serial memory interface circuit to the first logical circuit and setting the first scan pattern for power saving in the first scan chain under control of the central processing device.

Abstract: A polarized wave shared array antenna according to an example embodiment includes: antenna elements 11a and 11b provided adjacent to each other on one surface of an antenna substrate 1, each of which being configured to generate two orthogonal linear polarized waves; feeding points 12a and 12b disposed in a first direction when viewed from each antenna element and feeding points 14a and 14b disposed in a second direction orthogonal to the first direction when viewed from each antenna element; transmission and reception units 21a, 21b, 22a, and 22b that are provided on an integrated circuit on the other surface of the antenna substrate 1 and are respectively connected to the feeding points, in which in a plan view, the feeding points are disposed so as to be arranged on a straight line, and wirings connecting the transmission and transmission units to the corresponding feeding points are equal in length.

Abstract: In order to enable a reduction in the time required to calibrate the amplitude phase of an antenna device, this processing device is provided with: a setting unit group which performs setting from a predetermined three or more-valued phase value regarding the phase value of a signal received by each of a plurality of antenna elements or a signal transmitted from each of the antenna elements with respect to a calibration signal, on the basis of information extracted from one control information, and derives set signals that are signals on which the setting has been performed; and a computing unit which outputs a correlation value that is a value indicating a correlation between the sum of the set signals and the control information.

Abstract: An interference signal generation device includes a first converter configured to perform conversion on a frequency of an input signal based on a center frequency of a frequency band to be interfered, and a second converter configured to further perform conversion on a frequency of an output signal of the first converter based on the center frequency.