Abstract: This invention provides a semiconductor device contrived to prevent a reference voltage and a reference current which are supplied to a high speed OCO from varying with a change in ambient temperature and/or a change in an external power supply voltage and to reduce the circuit area of a power supply module. The high speed OCO outputs a high speed clock whose magnitude is determined by the reference current and the reference voltage. A temperature sensor detects the ambient temperature of the high speed OCO and a voltage sensor detects the operating voltage of the high speed OCO. The power supply module includes a BGR and generates the reference voltage, reference current, and operating voltage of the high speed OCO, based on a primary reference voltage which is output by the BGR. A flash memory stores a table specifying trimming codes for the reference voltage and reference current, related to an ambient temperature and an operating voltage of the high speed OCO.

Abstract: Disclosed is a phthalocyanine compound characterized by being represented by the formula (1) below. This phthalocyanine compound has good affinity to titania, and is suitably used for an organic thin film of an organic solar cell and the like. [In the formula, M represents a hydrogen atom or a central metal; Z1 and Z2 independently represent a hydroxy group, an alkoxy group having 1 to 18 carbon atoms or a phenyl group; and Ar represents at least one aryl group selected from those represented by the following formulae (2) to (12). (In the formulae (2) to (12), R1 to R103 independently represent a hydrogen atom, a halogen atom, a hydroxy group, an amino group, a silanol group, a thiol group, a carboxyl group, a phosphoric acid group, a phosphate group, an ester group, a thioester group, an amide group, a nitro group, a monovalent hydrocarbon group, an organoxy group, an organoamino group, an organosilyl group, an organothio group, an acyl group or a sulfone group.

Abstract: A thiophene compound having a phosphate group, for example, one represented by the formula [1]. The compound has high resistance to heat and oxidation and can be improved in solubility or dispersibility in various solvents. (In the formula, R1 and R2 each independently represents, e.g., hydrogen, halogeno, cyano, or phenyl optionally substituted by W; and R3 to R6 each independently represents —OR7, SR8, or —NR92, provided that R7 to R9 each independently represents hydrogen, C1-10 alkyl, or phenyl optionally substituted by W and W represents halogeno, cyano, nitro, hydroxyl, mercapto, amino, formyl, carboxy, C1-10 alkyl, etc.

Abstract: With this flash memory, because a plurality of memory blocks are formed on a surface of a single P-type well, a layout area can be made small. Further, when erasing data for a memory block to be erased, a voltage of the P-type well is applied to all word lines of a memory block to be not erased. Consequently, the voltage of the P-type well and the voltage of all word lines of the memory block to be not erased change at the same time. With this, it is possible to prevent a threshold voltage for the memory block to be not erased from changing.

Abstract: A thiophene compound having sulfonyl groups which is represented by the formula [1]. It has high heat resistance and high unsusceptibility to oxidation and can improve solubility and dispersibility in various solvents. [In the formula, R1 and R2 each independently represents hydrogen, halogeno, cyano, etc.; and R3 and R3? each independently represents C1-20 alkyl, C1-20 haloalkyl, phenyl optionally substituted by W, thienyl optionally substituted by W, etc. (W represents chlorine, etc.).

Abstract: A semiconductor flash memory includes an erase/write control unit that, when performing an erase/write operation of read memory cells, reads and senses memory current of the read memory cells for each memory cell, and adjusts threshold voltage of each of the read memory cells to a predetermined value, and a readout control unit that, when performing a read operation, selects at least two read memory cells simultaneously from among the read memory cells to which the erase/write control unit stored the same data, and senses total memory current for the at least two read memory cells.

Abstract: With this flash memory, because a plurality of memory blocks are formed on a surface of a single P-type well, a layout area can be made small. Further, when erasing data for a memory block to be erased, a voltage of the P-type well is applied to all word lines of a memory block to be not erased. Consequently, the voltage of the P-type well and the voltage of all word lines of the memory block to be not erased change at the same time. With this, it is possible to prevent a threshold voltage for the memory block to be not erased from changing.

Abstract: A semiconductor flash memory includes an erase/write control unit that, when performing an erase/write operation of read memory cells, reads and senses memory current of the read memory cells for each memory cell, and adjusts threshold voltage of each of the read memory cells to a predetermined value, and a readout control unit that, when performing a read operation, selects at least two read memory cells simultaneously from among the read memory cells to which the erase/write control unit stored the same data, and senses total memory current for the at least two read memory cells.

Abstract: A semiconductor flash memory includes an erase/write control unit that, when performing an erase/write operation of read memory cells, reads and senses memory current of the read memory cells for each memory cell, and adjusts threshold voltage of each of the read memory cells to a predetermined value, and a readout control unit that, when performing a read operation, selects at least two read memory cells simultaneously from among the read memory cells to which the erase/write control unit stored the same data, and senses total memory current for the at least two read memory cells.

Abstract: A semiconductor flash memory includes an erase/write control unit that, when performing an erase/write operation of read memory cells, reads and senses memory current of the read memory cells for each memory cell, and adjusts threshold voltage of each of the read memory cells to a predetermined value, and a readout control unit that, when performing a read operation, selects at least two read memory cell simultaneously from among the read memory cells to which the erase/write control unit stored the same data, and senses total memory current for the at least two read memory cells

Abstract: A semiconductor flash memory includes an erase/write control unit that, when performing an erase/write operation of read memory cells, reads and senses memory current of the read memory cells for each memory cell, and adjusts threshold voltage of each of the read memory cells to a predetermined value, and a readout control unit that, when performing a read operation, selects at least two read memory cells simultaneously from among the read memory cells to which the erase/write control unit stored the same data, and senses total memory current for the at least two read memory cells.

Abstract: A semiconductor flash memory includes an erase/write control unit that, when performing an erase/write operation of read memory cells, reads and senses memory current of the read memory cells for each memory cell, and adjusts threshold voltage of each of the read memory cells to a predetermined value, and a readout control unit that, when performing a read operation, selects at least two read memory cells simultaneously from among the read memory cells to which the erase/write control unit stored the same data, and senses total memory current for the at least two read memory cells.