Abstract: An information processing apparatus includes a plurality of cores that perform a plurality of respective tasks in parallel; and a plurality of cache memories that are provided corresponding to each of the plurality of cores and that store data to be referred to by the corresponding task at the time of execution, and wherein at least one of the plurality of cores is configured to: specify, for each of the cores, an overlap between the data referred to by the task that has been executed at the time of execution and data to be referred to by the task that is not yet executed at the time of execution, and executes the task that is not yet executed in a core having the largest overlap among the plurality of cores

Abstract: Upon reception of a first compilation command that contains an instruction for executing link time optimization, the apparatus generates a first object file that contains source-code information including a source code and does not contain an object code. Upon reception of a first link command that contains the instruction for executing the link time optimization, the apparatus generates the object code by executing the link time optimization and compilation on the source code information contained in the first object file, and generates a second object file that contains the generated object code. Upon reception of a second link command that does not contain an instruction for executing the link time optimization, the apparatus generates the object code by executing the compilation on the source code information contained in the first object file, and generates a third object file that contains the generated object code.

Abstract: An information processor including a memory; and a processor coupled to the memory and method thereof. The processor is configured to store first identification information of a first source file corresponding to an object file that is not linked, judge whether second identification information of a second source file specified as a target of compilation is stored in the memory, and generate an object file through compilation on a third source file where the second identification information of the second source file is stored in the memory. The processor is also configured to perform inter-file optimization on the second source file and the third source file to generate a plurality of intermediate files and generate a plurality of object files through compilation on the plurality of generated intermediate files.

Abstract: Upon reception of a first compilation command that contains an instruction for executing link time optimization, the apparatus generates a first object file that contains source-code information including a source code and does not contain an object code. Upon reception of a first link command that contains the instruction for executing the link time optimization, the apparatus generates the object code by executing the link time optimization and compilation on the source code information contained in the first object file, and generates a second object file that contains the generated object code. Upon reception of a second link command that does not contain an instruction for executing the link time optimization, the apparatus generates the object code by executing the compilation on the source code information contained in the first object file, and generates a third object file that contains the generated object code.

Abstract: An information processor includes: a memory; and a processor coupled to the memory and the processor configured to: store first identification information of a first source file corresponding to an object file that is not linked; judge whether second identification information of a second source file specified as a target of compilation is stored in the memory, and generate an object file through compilation on a third source file other than the second source file where the second identification information of the second source file is stored in the memory; perform inter-file optimization on the second source file and the third source file other than the second source file to generate a plurality of intermediate files; and generate a plurality of object files through compilation on the plurality of generated intermediate files.

Abstract: A computer calculates memory access rates for respective tasks on basis of hardware monitor information obtained by monitoring operating states of hardware during execution of an application program. The tasks correspond to respective syntax units specified in the application program. The computer assigns, on basis of the calculated memory access rates, a first task to a socket in a processor in response to an instruction for executing the first task.

Abstract: A computer calculates memory access rates for respective tasks on basis of hardware monitor information obtained by monitoring operating states of hardware during execution of an application program. The tasks correspond to respective syntax units specified in the application program. The computer assigns, on basis of the calculated memory access rates, a first task to a socket in a processor in response to an instruction for executing the first task.

Abstract: A method of counting an actual usage time of each CPU in a computer system using a plurality of computers for distributed processing of jobs comprising first counting a CPU usage time used for each job, then counting a processing wait time in memory access of each CPU whenever executing each job, subtracting the processing wait time of each CPU from the CPU usage time for every job, and setting the thus calculated corrected CPU usage time as the actual CPU usage time. A job control system has a means for realizing this method and uses the CPU usage time and the corrected CPU usage time obtained by this means to control the jobs and charge the users.

Abstract: A method of counting an actual usage time of each CPU in a computer system using a plurality of computers for distributed processing of jobs comprising first counting a CPU usage time used for each job, then counting a processing wait time in memory access of each CPU whenever executing each job, subtracting the processing wait time of each CPU from the CPU usage time for every job, and setting the thus calculated corrected CPU usage time as the actual CPU usage time. A job control system has a means for realizing this method and uses the CPU usage time and the corrected CPU usage time obtained by this means to control the jobs and charge the users.

Abstract: A parallel processing apparatus and method for processing data transferred between a plurality of processors each having a storage. Each of the plurality of processors corresponds a global virtual address in a global virtual memory space where a parallel processing between the plurality of processors is performed and a local virtual address in a local virtual memory space where an individual process in one of the processors is performed to an identical real address.