Abstract: To keep a constant gate bias voltage to prevent a saturation output power from being decreased even when a GaAs FET for power amplification is operated near the saturation region, current amplification of an output from an operational amplifier (23) is performed by a transistor (24), and a gate bias voltage (Vg) is supplied to the gate of a GaAs FET (1). The gate bias voltage (Vg) is fed back to one input terminal of the operational amplifier (23), and a voltage obtained through voltage-dividing resistors (21, 22) is supplied to the other input terminal so that the operational amplifier serves as a voltage follower.

Abstract: A high input resistance circuit that produces an output signal with a voltage gain of unity includes an input section, a feedback section, a high input resistance amplification section, and an output section. In the input section, transistors 1.sub.a and 1.sub.b form a differential amplification circuit using transistors 2.sub.a and 2.sub.b as emitter resistors, respectively. A feedback circuit is formed by transistors 3.sub.a and 3.sub.b whose collectors are connected to bases of transistors 1.sub.a, 1.sub.b, respectively, and whose emitters are connected to the collector of transistor 8.sub.b of the output section. The bases of transistors 3.sub.a and 3.sub.b are provided a bias from a bias terminal 106 so as to suppress a collector current. In the high input resistance amplification section, transistors 4.sub.a and 4.sub.b form an emitter follower circuit using transistors 5.sub.a, 5.sub.b and resistors R.sub.1, R.sub.2 as emitter resistors, respectively. In the output section, transistors 6.sub.a and 6.