Abstract: A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

Abstract: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.

Abstract: There is provided a fuse module that holds trimming information for an internal oscillation circuit module. The fuse module includes information-writing fuse circuits to which trimming information is written depending on whether an information-writing fuse is blown; a reference fuse circuit for determining whether the information-writing fuse has been blown; and a current-to-voltage converter section. Since the reference fuse circuit and the current-to-voltage converter section are shared by the information-writing fuse circuits, the circuit area of the fuse module is greatly reduced.

Abstract: A microcomputer incorporating a flash memory which is erased and programmed electrically in a stable manner within a relatively wide range of external power supply voltages including those for low-voltage operations. The microcomputer comprises a voltage clamp unit including a reference voltage generating circuit and a constant voltage generating circuit. In operation, the voltage clamp unit generates a voltage of a low dependency on a supply voltage and clamps the generated voltage to a voltage level which, within a tolerable range, is lower than a single supply voltage externally furnished. This prevents voltages boosted by boosting circuits operating on the clamped voltage, i.e., programming and erasure voltages, from being dependent on the externally supplied voltage.

Abstract: A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

Abstract: A semiconductor integrated circuit capable of performing internal oscillation with high precision is provided. The semiconductor integrated circuit has a memory circuit, an oscillator circuit for generating an internal clock signal based on control information held in the memory circuit, a logic circuit for generating control information for causing the frequency of the internal clock signal to coincide with the frequency of an external clock signal, and an electric fuse circuit or a blow fuse circuit capable of storing the control information generated in the logic circuit and uses the internal clock signal for the synchronous operation of the internal circuit.

Abstract: A data processing system (1) has an erasable and programmable non-volatile memory (5) and a central processing unit (2). The central processing unit allows only a specified partial storage area (20Ba) of the non-volatile memory to be intended for a software ECC process. Since ECC codes are added to the partial storage area alone and an error correction is made thereto to thereby increase the number of rewrite assurances, substantially needless waste of each storage area by ECC codes can b avoided as compared with a configuration in which the ECC codes are added to all the write data without distinction regardless of the storage areas. Further, since software copes with ECC processing, ECC correcting capability matched with a device characteristic of the non-volatile memory can easily be selected.

Abstract: A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

Abstract: An I/O buffer section is provided with a status setting circuit. The status setting circuit arbitrarily sets a signal state of an I/O terminal according to a combination of control signals stored in a setting register. Thus, the I/O buffer section is temporarily set to a Hi-Z state by the status setting circuit even in the case of the I/O terminal originally set to a signal holding state. Consequently, a leak test for testing whether the I/O buffer section is good or bad, can be performed, and the reliability of a semiconductor device can be enhanced.

Abstract: A data processing system (1) has an erasable and programmable non-volatile memory (5) and a central processing unit (2). The central processing unit allows only a specified partial storage area (20Ba) of the non-volatile memory to be intended for a software ECC process. Since ECC codes are added to the partial storage area alone and an error correction is made thereto to thereby increase the number of rewrite assurances, substantially needless waste of each storage area by ECC codes can be avoided as compared with a configuration in which the ECC codes are added to all the write data without distinction regardless of the storage areas. Further, since software copes with ECC processing, ECC correcting capability matched with a device characteristic of the non-volatile memory can easily be selected.

Abstract: The present invention provides a microcomputer wherein in a system which needs to respond to events developed at intervals each shorter than an erase/program process time, erase/programming can be effected on an on-chip non-volatile memory as necessary during its processing. An erase and program control program for an electrically erasable and programmable non-volatile memory is configured inclusive of a loop of the application of a high voltage pulse and data verify or the like, for example. If a program jumped to a subroutine for an address specified by a user is programmed in advance during this loop, then a process by a CPU can be temporarily jumped to the subroutine for the user defined address. Thus, erase and programming can be effected on a system which needs to confirm internal and external events every predetermined intervals or a system with a learning function, or the like during the execution of a user program.

Abstract: A microcomputer incorporating a flash memory which is erased and programmed electrically in a stable manner within a relatively wide range of external power supply voltages including those for low-voltage operations The microcomputer comprises a voltage-clamp unit including a reference voltage generating circuit and a constant voltage generating circuit. In operation, the voltage clamp unit generates a voltage of a low dependency on a supply voltage and clamps the generated voltage to a voltage level which, within a tolerable range, is lower than a single supply voltage externally furnished. This prevents voltages boosted by boosting circuits operating on the clamped voltage, i.e., programming and erasure voltages, from being dependent on the externally supplied voltage.

Abstract: A microcomputer capable of on-board programming of dedicated user communication protocols without requiring a serial interface on the mounted board, and that will not destroy the dedicated user communication protocol code even if the system runs out of control. A user boot mat other than a user mat is provided for programming control programs for the user in the on-chip non-volatile memory of the microcomputer. The user boot mat serves as the mat for programming the dedicated user communication protocol and also provides a user boot mode for running the program. The user boot mat cannot program or erase in this user boot mode. By separating the user boot mat and user mat, an interface capable of programming and erasing the user-specified programming can be achieved without having to program a dedicated communication protocol on the user mat.

Abstract: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.

Abstract: In an A/D converter and a microcontroller including the same, the number of selection patterns of analog input channels is increased for each A/D conversion and the A/D conversion is conducted using an A/D converter having only fundamental functions without imposing load onto a CPU. The A/D converter or a DMA transfer device includes an A/D conversion table including one or more entries. Each entry includes enable bits for setting whether or not an A/D conversion is executed for the respective analog input channels and a plurality of count number bits for setting a number of executions of the A/D conversion.

Abstract: A microcomputer incorporating a flash memory which is erased and programmed electrically in a stable manner within a relatively wide range of external power supply voltages including those for low-voltage operations. The microcomputer comprises a voltage clamp unit including a reference voltage generating circuit and a constant voltage generating circuit. In operation, the voltage clamp unit generates a voltage of a low dependency on a supply voltage and clamps the generated voltage to a voltage level which, within a tolerable range, is lower than a single supply voltage externally furnished. This prevents voltages boosted by boosting circuits operating on the clamped voltage, i.e., programming and erasure voltages, from being dependent on the externally supplied voltage.

Abstract: A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

Abstract: A microcomputer capable of on-board programming of dedicated user communication protocols without requiring a serial interface on the mounted board, and that will not destroy the dedicated user communication protocol code even if the system runs out of control. A user boot mat other than a user mat is provided for programming control programs for the user in the on-chip non-volatile memory of the microcomputer. The user boot mat serves as the mat for programming the dedicated user communication protocol and also provides a user boot mode for running the program. The user boot mat cannot program or erase in this user boot mode. By separating the user boot mat and user mat, an interface capable of programming and erasing the user-specified programming can be achieved without having to program a dedicated communication protocol on the user mat.

Abstract: A microcomputer incorporating a flash memory which is erased and programmed electrically in a stable manner within a relatively wide range of external power supply voltages including those for low-voltage operations. The microcomputer comprises a voltage clamp unit including a reference voltage generating circuit and a constant voltage generating circuit. In operation, the voltage clamp unit generates a voltage of a low dependency on a supply voltage and clamps the generated voltage to a voltage level which, within a tolerable range, is lower than a single supply voltage externally furnished. This prevents voltages boosted by boosting circuits operating on the clamped voltage, i.e., programming and erasure voltages, from being dependent on the externally supplied voltage.

Abstract: A microcomputer incorporating a flash memory which is erased and programmed electrically in a stable manner within a relatively wide range of external power supply voltages including those for low-voltage operations. The microcomputer comprises a voltage clamp unit including a reference voltage generating circuit and a constant voltage generating circuit In operation, the voltage clamp unit generates a voltage of a low dependency on a supply voltage and clamps the generated voltage to a voltage level which, within a tolerable range, is lower than a single supply voltage externally furnished This prevents voltages boosted by boosting circuits operating on the clamped voltage, i.e., programming and erasure voltages, from being dependent on the externally supplied voltage.