Patents by Inventor Naoki Yuzawa

Naoki Yuzawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8428927
    Abstract: A simulation method includes obtaining an execution log generated while a predetermined processing is executed by simulating a series of operations in a test model that is a modeled version of a test target device by causing a predetermined processing to be executed in the test model, extracting a processing unit log constituted by a predetermined processing unit from the execution log obtained in the obtaining, and simulating an operation in which processing corresponding to the processing unit log extracted in the extracting is executed in a test model in which a part of function of the test target device is modified, the operation being simulated on the basis of a setting condition set by a user.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: April 23, 2013
    Assignee: Fujitsu Limited
    Inventors: Noriyasu Nakayama, Nobukazu Koizumi, Tomoki Kato, Naoki Yuzawa, Hiroyuki Hieda, Satoshi Hiramoto
  • Patent number: 8214189
    Abstract: A performance evaluation simulation apparatus divides a process into basic process units based on an execution log, calculates a throughput of each basic process unit from information held in the execution log, changes an arrangement structure so that a basic process unit with the calculated throughput exceeding a predetermined threshold is disposed in a hardware model, and performs a performance evaluation simulation on the hardware model and a software model to generate statistical information on which performance evaluation is based.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: July 3, 2012
    Assignee: Fujitsu Limited
    Inventors: Tomoki Kato, Nobukazu Koizumi, Noriyasu Nakayama, Naoki Yuzawa, Hiroyuki Hieda, Satoshi Hiramoto
  • Publication number: 20100204975
    Abstract: A simulation method includes obtaining an execution log generated while a predetermined processing is executed by simulating a series of operations in a test model that is a modeled version of a test target device by causing a predetermined processing to be executed in the test model, extracting a processing unit log constituted by a predetermined processing unit from the execution log obtained in the obtaining, and simulating an operation in which processing corresponding to the processing unit log extracted in the extracting is executed in a test model in which a part of function of the test target device is modified, the operation being simulated on the basis of a setting condition set by a user.
    Type: Application
    Filed: April 13, 2010
    Publication date: August 12, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Noriyasu Nakayama, Nobukazu Koizumi, Tomoki Kato, Naoki Yuzawa, Hiroyuki Hieda, Satoshi Hiramoto
  • Publication number: 20090204380
    Abstract: A performance evaluation simulation apparatus divides a process into basic process units based on an execution log, calculates a throughput of each basic process unit from information held in the execution log, changes an arrangement structure so that a basic process unit with the calculated throughput exceeding a predetermined threshold is disposed in a hardware model, and performs a performance evaluation simulation on the hardware model and a software model to generate statistical information on which performance evaluation is based.
    Type: Application
    Filed: December 8, 2008
    Publication date: August 13, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Tomoki Kato, Nobukazu Koizumi, Noriyasu Nakayama, Naoki Yuzawa, Hiroyuki Hieda, Satoshi Hiramoto
  • Publication number: 20050223103
    Abstract: A mail server 302 calculates a reject priority for every mail source address of an E-mail on the basis of a date/time when receiving the E-mail from a sender terminal 100, further, the mail server 302, if a mail source address of the mail which should be rejected, count of the E-mails exceeds a registerable mail address count in a receipt reject address list 304, executes control to register the mail addresses having higher reject priorities preferentially in the receipt reject address list 304.
    Type: Application
    Filed: August 18, 2004
    Publication date: October 6, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Kanji Hozumi, Naoki Yuzawa, Yuuichi Abe
  • Patent number: 5621653
    Abstract: An method of, and an apparatus for, converting layout data of a conductive portion is obtained in which conversion of layout data of the conductive portion is automatically performed in a reduced processing time, designing is performed efficiently, and development stages are reduced in number. The layout data conversion apparatus comprises a basic pattern unit (basic layout pattern), a storage means 1, a design rule memory means 2, a means for storing information about connection between basic pattern units 3, a basic layout pattern generation means 4, a connection determination means 5 for determining whether conductive portions are connected to each other a layer information determining means 6, an element configuration change means 7, a means for detecting and eliminating violation of design rules 8, a means for storing and displaying layout pattern arrangement result information 9, and a computation control means 10 for controlling operations of these means.
    Type: Grant
    Filed: June 30, 1995
    Date of Patent: April 15, 1997
    Assignee: Fujitsu Limited
    Inventor: Naoki Yuzawa