Patents by Inventor Naoko Inoue

Naoko Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240109459
    Abstract: A seat cushion is formed integrally by a body pad portion, an outer peripheral edge portion, and a connection portion. The outer peripheral edge portion protrudes toward a floor panel from the outer peripheral edge portion in a plan view and contacts a floor panel at its lower face. The connection portion is provided to protrude toward the floor panel at a portion which is separated from a front-side part of the outer peripheral edge portion and a rear-side part of the outer peripheral edge portion, respectively. The connection portion connects the floor panel and the body pad portion. A portion between the front-side part and the rear-side part of the outer peripheral edge portion in a vehicle longitudinal direction is a separation portion where a lower face of the seat cushion faces an upper face of the floor panel with a gap.
    Type: Application
    Filed: February 23, 2023
    Publication date: April 4, 2024
    Applicant: MAZDA MOTOR CORPORATION
    Inventors: Kenji MATSUMOTO, Miho KURATA, Sakayu TERADA, Daisuke YAMADA, Yuki HANAZAWA, Naoko MOTOYOSHI, Aoi FUJIMOTO, Junsuke INOUE, Takashi SUZUKI
  • Patent number: 9116425
    Abstract: A mold for the nanoimprint lithography and a method for forming the mold are disclosed. The mold comprises a base socket, a plug chip and an adhesive. The plug chip provides a fine pattern to be transcribed in a top surface thereof. The base socket provides a pocket within which the plug chip is set such that the top surface thereof is pushed out from the top surface of the base socket.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: August 25, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoko Inoue
  • Patent number: 8969989
    Abstract: An optical-to-electrical converter unit includes a substrate having front and back surfaces; an original waveguide unit; and an optical-to-electrical converter. The optical-to-electrical converter includes a light-receiving element optically coupled to the optical waveguide unit; a capacitance element including first and second conductive layers and an insulating layer disposed between the first and second conductive layers; an electrode pad electrically connected to the light-receiving element; a back electrode formed on the back surface of the substrate; and a via electrode extending from the front surface to the back surface of the substrate. The optical waveguide unit, the light-receiving element, the capacitance element, and the electrode pad are formed on the front surface. The first conductive layer of the capacitance element is electrically connected to the light-receiving element and the electrode pad.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: March 3, 2015
    Assignee: Sumitomo Electric Industries, Ltd
    Inventors: Yoshihiro Yoneda, Ryuji Masuyama, Hideki Yagi, Naoko Inoue
  • Patent number: 8946842
    Abstract: A method for manufacturing an optical waveguide receiver includes the steps of growing first and second stacked semiconductor layer sections, the second stacked semiconductor layer section including a core layer and a cladding layer; forming a first mask including first and second portions; etching the first and second stacked semiconductor layer sections by using the first mask, the first and second stacked semiconductor layer sections covered with the first portion being etched in a mesa structure, the second stacked semiconductor layer section covered with the second portion being etched in a terrace-shaped structure; removing the second portion from the first mask with the first portion left; selectively etching the cladding layer until exposing a surface of the core layer; and sequentially forming a first metal layer, an insulating film, and a second metal layer on the core layer exposed in the step of selectively etching the cladding layer.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: February 3, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Inoue
  • Publication number: 20140335644
    Abstract: A method for producing a spot size converter includes the steps of forming a first insulator mask on a stacked semiconductor layer; forming first and second terraces, and a waveguide mesa disposed between the first and second terraces by etching the stacked semiconductor layer using the first insulator mask, the first terrace having first to fourth terrace portions, the second terrace having fifth to eighth terrace portions, the waveguide mesa having first to fourth mesa portions; forming a second insulator mask including a first pattern on the first terrace portion, a second pattern on the fifth terrace portion, a third pattern on the third and fourth mesa portions, and a fourth pattern that integrally covers a region extending from the fourth terrace portion to the eighth terrace portion through the fourth mesa portion; and selectively growing a semiconductor layer by using the second insulator mask.
    Type: Application
    Filed: May 1, 2014
    Publication date: November 13, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoko INOUE, Hideki YAGI, Ryuji MASUYAMA, Yoshihiro YONEDA
  • Publication number: 20140246746
    Abstract: An optical-to-electrical converter unit includes a substrate having front and back surfaces; an optical waveguide unit; and an optical-to-electrical converter. The optical-to-electrical converter includes a light-receiving element optically coupled to the optical waveguide unit; a capacitance element including first and second conductive layers and an insulating layer disposed between the first and second conducive layers; an electrode pad electrically connected to the light-receiving element; a back electrode formed on the back surface of the substrate; and a via electrode extending from the front surface to the back surface of the substrate. The optical waveguide unit, the light-receiving element, the capacitance element, and the electrode pad are formed on the front surface. The first conductive layer of the capacitance element is electrically connected to the light-receiving element and the electrode pad.
    Type: Application
    Filed: March 4, 2014
    Publication date: September 4, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshihiro YONEDA, Ryuji MASUYAMA, Hideki YAGI, Naoko INOUE
  • Patent number: 8811830
    Abstract: A multi-channel optical waveguide receiver includes an optical input port; an optical branching unit; light-receiving elements having bias electrodes and signal electrodes; optical waveguides being optically coupled between the optical branching unit and the light-receiving elements; capacitors electrically connected between the bias electrodes and a reference potential, the capacitors and the bias electrodes being connected through interconnection patterns; and a signal amplifier including input electrodes. The optical branching unit, the light-receiving elements, the optical waveguides, and the capacitors are formed on a single substrate, the substrate having an edge extending in a first direction. The signal amplifier and the substrate are arranged in a second direction crossing the first direction. The input electrodes and the signal electrodes are arranged along the edge of the substrate.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: August 19, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshihiro Yoneda, Hideki Yagi, Naoko Inoue
  • Publication number: 20140070351
    Abstract: A method for manufacturing an optical waveguide receiver includes the steps of growing first and second stacked semiconductor layer sections, the second stacked semiconductor layer section including a core layer and a cladding layer; forming a first mask including first and second portions; etching the first and second stacked semiconductor layer sections by using the first mask, the first and second stacked semiconductor layer sections covered with the first portion being etched in a mesa structure, the second stacked semiconductor layer section covered with the second portion being etched in a terrace-shaped structure; removing the second portion from the first mask with the first portion left; selectively etching the cladding layer until exposing a surface of the core layer; and sequentially forming a first metal layer, an insulating film, and a second metal layer on the core layer exposed in the step of selectively etching the cladding layer.
    Type: Application
    Filed: September 4, 2013
    Publication date: March 13, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Ryuji MASUYAMA, Yoshihiro YONEDA, Hideki YAGI, Naoko INOUE
  • Publication number: 20130071129
    Abstract: A multi-channel optical waveguide receiver includes an optical input port; an optical branching unit; light-receiving elements having bias electrodes and signal electrodes; optical waveguides being optically coupled between the optical branching unit and the light-receiving elements; capacitors electrically connected between the bias electrodes and a reference potential, the capacitors and the bias electrodes being connected through interconnection patterns; and a signal amplifier including input electrodes. The optical branching unit, the light-receiving elements, the optical waveguides, and the capacitors are formed on a single substrate, the substrate having an edge extending in a first direction. The signal amplifier and the substrate are arranged in a second direction crossing the first direction. The input electrodes and the signal electrodes are arranged along the edge of the substrate.
    Type: Application
    Filed: September 11, 2012
    Publication date: March 21, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshihiro YONEDA, Hideki YAGI, Naoko INOUE
  • Publication number: 20120308680
    Abstract: A mold for the nanoimprint lithography and a method for forming the mold are disclosed. The mold comprises a base socket, a plug chip and an adhesive. The plug chip provides a fine pattern to be transcribed in a top surface thereof. The base socket provides a pocket within which the plug chip is set such that the top surface thereof is pushed out from the top surface of the base socket.
    Type: Application
    Filed: May 25, 2012
    Publication date: December 6, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoko INOUE
  • Patent number: 6197775
    Abstract: A compound represented by the following general formula (I) which has an antiviral activity: wherein R1 represents hydrogen atom, C1-C6 alkyl group, or C7-C10 aralkyl group; R2 represents C1-C6 alkyl group, C7-C10 aralkyl group, or phenyl group; R3 and R4 independently represent hydrogen atom, C1-C6 alkyl group, acyloxymethyl group, acylthioethyl group, or ethyl gorup substituted with at least one halogen atom; R5 represents hydrogen atom, C1-C4 alkyl gorup, C1-C4 hydroxyalkyl group, C1-C4 alkyl group substituted with at least one halogen atom; and X represents carbon atom or nitrogen atom.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: March 6, 2001
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Masaru Ubasawa, Hideaki Takashima, Kouichi Sekiya, Naoko Inoue, Satoshi Yuasa, Naohiro Kamiya
  • Patent number: 6037335
    Abstract: Phosphonate-nucleotide ester compounds of the formula (I) have excellent antiviral activity and antineoplastic activity. Further, they can be orally administered. ##STR1## wherein ring A represents ##STR2## wherein R.sup.1 and R.sup.2 independently represent hydrogen, halogen, hydroxyl, mercapto, C.sub.6 -C.sub.10 arylthio or amino; R.sup.3 represents C.sub.1 -C.sub.4 alkyl or ethyl having one or more substituents selected from the group consisting of fluorine, C.sub.1 -C.sub.4 alkoxy, phenoxy, C.sub.7 -C.sub.10 phenylalkoxy and C.sub.2 -C.sub.5 acyloxy; R.sup.4 represents ethyl having one or more substituents selected from the group consisting of fluorine, C.sub.1 -C.sub.4 alkoxy, phenoxy, C.sub.7 -C.sub.10 phenylalkoxy and C.sub.2 -C.sub.5 acyloxy; X, Y and Z independently represent methyne or nitrogen atom; or a pharmaceutically acceptable salt thereof.
    Type: Grant
    Filed: October 2, 1997
    Date of Patent: March 14, 2000
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Hideaki Takashima, Naoko Inoue, Masaru Ubasawa, Kouichi Sekiya, Shingo Yabuuchi