Patents by Inventor Naoko Konishi

Naoko Konishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200303903
    Abstract: A method for manufacturing an optical semiconductor device, includes the steps of: forming a plurality of compound semiconductor layers including a sacrificial layer, an absorption layer, and a core layer; forming a first mesa from the plurality of compound semiconductor layers; forming an embedding layer that is a semiconductor layer having the first mesa embedded therein; after the step of forming the embedding layer, etching the sacrificial layer to form a chip including the plurality of compound semiconductor layers and the embedding layer; bonding the chip to a substrate comprising silicon and having a waveguide; and etching a portion of the first mesa of the chip bonded to the substrate to form a second mesa adjacent to the first mesa. The second mesa includes the core layer and is optically coupled to the waveguide of the substrate.
    Type: Application
    Filed: February 26, 2020
    Publication date: September 24, 2020
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki YAGI, Naoko KONISHI, Takuo HIRATANI
  • Patent number: 10741591
    Abstract: A semiconductor integrated optical device includes: a supporting base including semi-insulating semiconductor; a first photoelectric convertor having first photodiode mesas; a second photoelectric convertor having second photodiode mesas; a first 90° optical hybrid having at least one first multimode waveguide mesa; a second 90° optical hybrid having at least one second multimode waveguide mesa; an optical divider mesa; first and second input waveguide mesas coupling the first and second 90° optical hybrids with the optical divider mesa, respectively; a conductive semiconductor region disposed on the supporting base, the conductive semiconductor region mounting the first photodiode mesas, the second photodiode mesas, the first multimode waveguide mesas, the second multimode waveguide mesas, and the optical divider mesa; a first island semiconductor mesa extending between the first and second multimode waveguide mesas; and a first groove extending through the first island semiconductor mesa and the conductive
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: August 11, 2020
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Hideki Yagi, Naoko Konishi, Koji Ebihara, Takuya Okimoto
  • Patent number: 10545285
    Abstract: A hybrid optical assembly includes: a photonic device having a waveguide structure including group IV semiconductor and oxide; and an optical source device including group III-V semiconductor. The source device is bonded to the photonic device. The source device and the waveguide structure are arranged in a direction of a first axis. The source device has a first semiconductor mesa including an upper core layer and a first upper cladding layer and a second semiconductor mesa including a lower core layer and a second upper cladding layer. The first and second semiconductor mesas extend in a direction of a second axis intersecting the first axis. The second semiconductor mesa has a length larger than that of the first semiconductor mesa. The lower core layer, the second upper cladding layer, and the upper core layer and the first upper cladding layer are arranged in the direction of the first axis.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: January 28, 2020
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki Yagi, Naoko Konishi
  • Publication number: 20190267412
    Abstract: A semiconductor integrated optical device includes: a supporting base including semi-insulating semiconductor; a first photoelectric convertor having first photodiode mesas; a second photoelectric convertor having second photodiode mesas; a first 90° optical hybrid having at least one first multimode waveguide mesa; a second 90° optical hybrid having at least one second multimode waveguide mesa; an optical divider mesa; first and second input waveguide mesas coupling the first and second 90° optical hybrids with the optical divider mesa, respectively; a conductive semiconductor region disposed on the supporting base, the conductive semiconductor region mounting the first photodiode mesas, the second photodiode mesas, the first multimode waveguide mesas, the second multimode waveguide mesas, and the optical divider mesa; a first island semiconductor mesa extending between the first and second multimode waveguide mesas; and a first groove extending through the first island semiconductor mesa and the conductive
    Type: Application
    Filed: February 22, 2019
    Publication date: August 29, 2019
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Hideki Yagi, Naoko Konishi, Koji Ebihara, Takuya Okimoto
  • Publication number: 20190250328
    Abstract: A hybrid optical assembly includes: a photonic device having a waveguide structure including group IV semiconductor and oxide; and an optical source device including group III-V semiconductor. The source device is bonded to the photonic device. The source device and the waveguide structure are arranged in a direction of a first axis. The source device has a first semiconductor mesa including an upper core layer and a first upper cladding layer and a second semiconductor mesa including a lower core layer and a second upper cladding layer. The first and second semiconductor mesas extend in a direction of a second axis intersecting the first axis. The second semiconductor mesa has a length larger than that of the first semiconductor mesa. The lower core layer, the second upper cladding layer, and the upper core layer and the first upper cladding layer are arranged in the direction of the first axis.
    Type: Application
    Filed: February 8, 2019
    Publication date: August 15, 2019
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki YAGI, Naoko KONISHI
  • Patent number: 9893100
    Abstract: A semiconductor optical device that integrates photodiodes (PDs) and optical waveguides coupling with the PDs and a method of forming the semiconductor optical device are disclosed. The optical waveguides in a portion in the lower cladding layer thereof provides a modified layer that forms a conduction barrier of the lower cladding layer. The modified layer is formed by converting the conduction type thereof or implanting protons therein. The modified layer prevents the electrical coupling between PDs through the waveguides.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: February 13, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshihiro Yoneda, Ryuji Masuyama, Hideki Yagi, Naoko Konishi
  • Publication number: 20160380023
    Abstract: A semiconductor optical device that integrates photodiodes (PDs) and optical waveguides coupling with the PDs and a method of forming the semiconductor optical device are disclosed. The optical waveguides in a portion in the lower cladding layer thereof provides a modified layer that forms a conduction barrier of the lower cladding layer. The modified layer is formed by converting the conduction type thereof or implanting protons therein. The modified layer prevents the electrical coupling between PDs through the waveguides.
    Type: Application
    Filed: June 27, 2016
    Publication date: December 29, 2016
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshihiro YONEDA, Ryuji MASUYAMA, Hideki YAGI, Naoko KONISHI
  • Patent number: 9366820
    Abstract: A coherent mixer includes a multi-mode waveguide that has a side surface and an end; a waveguide group including a plurality of semiconductor regions connected to the end; a first semiconductor region that has a side surface extending substantially parallel to the side surface of the multi-mode waveguide; and an external semiconductor region having a side surface extending substantially parallel to an edge of the waveguide group. The side surface of the semiconductor region is spaced apart from the side surface of the multi-mode waveguide by a distance smaller than or equal to a reference value. The side surface of the external semiconductor region is spaced apart from the edge of the waveguide group by a distance smaller than or equal to the reference value. The reference value is a maximum value of distances between arbitrary adjacent semiconductor regions in the waveguide group.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: June 14, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoko Konishi, Yutaka Onishi
  • Patent number: 9366835
    Abstract: An integrated optical semiconductor device includes a substrate including first and second regions; a plurality of light receiving devices disposed in the second region; a multimode interference coupler disposed in the first region, the multimode interference coupler including output optical waveguides optically coupled to the corresponding light receiving devices; first and second conductive layers disposed on a back surface of the substrate in the first and second regions, respectively; and a plurality of capacitors disposed in the second region, each of the capacitors including a first electrode connected to one of the light receiving devices and a second electrode connected to the second conductive layer. The second conductive layer is electrically insulated from the first conductive layer. The substrate is made of a semi-insulating semiconductor. The multimode interference coupler and the light receiving devices include the same n-type semiconductor layer disposed on a principal surface of the substrate.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: June 14, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Patent number: 9176360
    Abstract: A method for producing a spot-size convertor includes the steps of preparing a substrate; forming a stacked semiconductor layer including first and second core layers on the substrate; forming a mesa structure by etching the stacked semiconductor layer using a first mask, the mesa structure including a side surface and a bottom portion of the first core layer; forming a protective mask covering the side surface; etching the bottom portion using the protective mask to form a top mesa; and forming a bottom mesa by etching the second core layer using a second mask. The top mesa includes the first core layer and a portion having a mesa width gradually reduced in a first direction of a waveguide axis. The bottom mesa includes the second core layer and a portion having a mesa width gradually reduced in a second direction opposite to the first direction.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: November 3, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki Yagi, Naoko Konishi, Takamitsu Kitamura, Naoya Kono
  • Publication number: 20150260933
    Abstract: An integrated optical semiconductor device includes a substrate including first and second regions; a plurality of light receiving devices disposed in the second region; a multimode interference coupler disposed in the first region, the multimode interference coupler including output optical waveguides optically coupled to the corresponding light receiving devices; first and second conductive layers disposed on a back surface of the substrate in the first and second regions, respectively; and a plurality of capacitors disposed in the second region, each of the capacitors including a first electrode connected to one of the light receiving devices and a second electrode connected to the second conductive layer. The second conductive layer is electrically insulated from the first conductive layer. The substrate is made of a semi-insulating semiconductor. The multimode interference coupler and the light receiving device include the same n-type semiconductor layer disposed on a principal surface of the substrate.
    Type: Application
    Filed: March 10, 2015
    Publication date: September 17, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Patent number: 9103976
    Abstract: A method for manufacturing a waveguide-type semiconductor device includes the steps of forming an epitaxial structure including a waveguide mesa and a device mesa; forming a mask for selective growth on the epitaxial structure; growing a semiconductor region on an end surface of the device mesa by using the mask for selective growth, the semiconductor region including a side portion having a layer shape and a protruding wall portion; forming an ohmic electrode on a top surface of the device mesa; forming a resin layer on the device mesa and the semiconductor region; forming a resin mask having an opening on the ohmic electrode; forming an electric conductor connecting the ohmic electrode to an electrode pad, the electric conductor passing over the protruding wall portion while making contact with a surface of the resin mask; and removing the resin mask after forming the electric conductor.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: August 11, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Patent number: 9023677
    Abstract: A method for producing a spot size converter includes the steps of forming a first insulator mask on a stacked semiconductor layer; forming first and second terraces, and a waveguide mesa disposed between the first and second terraces by etching the stacked semiconductor layer using the first insulator mask, the first terrace having first to fourth terrace portions, the second terrace having fifth to eighth terrace portions, the waveguide mesa having first to fourth mesa portions; forming a second insulator mask including a first pattern on the first terrace portion, a second pattern on the fifth terrace portion, a third pattern on the third and fourth mesa portions, and a fourth pattern that integrally covers a region extending from the fourth terrace portion to the eighth terrace portion through the fourth mesa portion; and selectively growing a semiconductor layer by using the second insulator mask.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: May 5, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Naoko Konishi, Hideki Yagi, Ryuji Masuyama, Yoshihiro Yoneda
  • Publication number: 20150024527
    Abstract: A method for producing a spot-size convertor includes the steps of preparing a substrate; forming a stacked semiconductor layer including first and second core layers on the substrate; forming a mesa structure by etching the stacked semiconductor layer using a first mask, the mesa structure including a side surface and a bottom portion of the first core layer; forming a protective mask covering the side surface; etching the bottom portion using the protective mask to form a top mesa; and forming a bottom mesa by etching the second core layer using a second mask. The top mesa includes the first core layer and a portion having a mesa width gradually reduced in a first direction of a waveguide axis. The bottom mesa includes the second core layer and a portion having a mesa width gradually reduced in a second direction opposite to the first direction.
    Type: Application
    Filed: July 15, 2014
    Publication date: January 22, 2015
    Inventors: Hideki YAGI, Naoko KONISHI, Takamitsu KITAMURA, Naoya KONO
  • Publication number: 20140342491
    Abstract: A method for manufacturing a waveguide-type semiconductor device includes the steps of forming an epitaxial structure including a waveguide mesa and a device mesa; forming a mask for selective growth on the epitaxial structure; growing a semiconductor region on an end surface of the device mesa by using the mask for selective growth, the semiconductor region including a side portion having a layer shape and a protruding wall portion; forming an ohmic electrode on a top surface of the device mesa; forming a resin layer on the device mesa and the semiconductor region; forming a resin mask having an opening on the ohmic electrode; forming an electric conductor connecting the ohmic electrode to an electrode pad, the electric conductor passing over the protruding wall portion while making contact with a surface of the resin mask; and removing the resin mask after forming the electric conductor.
    Type: Application
    Filed: May 16, 2014
    Publication date: November 20, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Publication number: 20140334775
    Abstract: A coherent mixer includes a multi-mode waveguide that has a side surface and an end; a waveguide group including a plurality of semiconductor regions connected to the end; a first semiconductor region that has a side surface extending substantially parallel to the side surface of the multi-mode waveguide; and an external semiconductor region having a side surface extending substantially parallel to an edge of the waveguide group. The side surface of the semiconductor region is spaced apart from the side surface of the multi-mode waveguide by a distance smaller than or equal to a reference value. The side surface of the external semiconductor region is spaced apart from the edge of the waveguide group by a distance smaller than or equal to the reference value. The reference value is a maximum value of distances between arbitrary adjacent semiconductor regions in the waveguide group.
    Type: Application
    Filed: May 1, 2014
    Publication date: November 13, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD
    Inventors: Naoko Konishi, Yutaka ONISHI