Patents by Inventor Naomi Awano

Naomi Awano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5629534
    Abstract: There is provided a monolithic photocoupler which is easy to integrate. An SOI structure is formed by providing a first insulation layer on a silicon substrate. The semiconductor single crystal region is further divided by trench insulation layers into separate regions. Light emitting elements are formed on one of the separated semiconductor single crystal region and light receiving elements are formed on the other semiconductor single crystal region. The light emitting elements are obtained by forming light emitting diodes made of GaAs or the like on the substrate using a heterogeneous growth process. An optical waveguide made of a material which is optically transparent and electrically insulative such as a TiO.sub.2 film on each pair of light emitting and light receiving elements. The insulation layers constituted by SiO.sub.2 layers have a refractive index smaller that of the active layer of the substrate.
    Type: Grant
    Filed: August 2, 1996
    Date of Patent: May 13, 1997
    Assignee: Nippondenso Co., Ltd.
    Inventors: Hajime Inuzuka, Naomi Awano, Takeshi Hasegawa, Masahito Mizukoshi
  • Patent number: 5610412
    Abstract: A semiconductor device having superior light output efficiency is disclosed. A p-Si diffusion layer is formed on a Si substrate and an n-Si diffusion layer is formed in the p-Si diffusion layer. An n-GaAs layer constituting an active region for emitting light is grown on the p-Si diffusion layer and the n-Si diffusion layer of the Si substrate and a p-GaAs layer constituting an active region for emitting light is grown on the n-GaAs layer. An upper electrode is disposed on an upper surface of the p-GaAs layer above the p-Si diffusion layer. Current is injected from the upper electrode through a region of the pn junction between the n-GaAs layer and the p-GaAs layer other than that directly below the upper electrode, and light is emitted from this region. The emitted light passes through the p-GaAs layer to outside the device without passing through and being attenuated by the upper electrode.
    Type: Grant
    Filed: October 19, 1995
    Date of Patent: March 11, 1997
    Assignee: Nippondenso Co., Ltd.
    Inventors: Naomi Awano, Hajime Inuzuka, Masahito Mizukoshi, Shigeki Kudomi
  • Patent number: 5578521
    Abstract: A silicon semiconductor substrate, on which an epitaxial layer is to be formed, is set in a reaction vessel having a heating mechanism, and a gas containing TMG and AsH.sub.3 is introduced into the reaction vessel with the substrate heated to 450.degree. C., thus forming, on the substrate, a low-temperature growth layer of amorphous or polycrystalline GaAs as a semiconductor substance having a different lattice constant from that of the substrate. Then, with the TMG removed from the introduced gas, the temperature of the semiconductor substrate is increased to 750.degree. C., to cause coagulation of atoms of the low-temperature growth layer, with a thermal treatment also being performed at this high temperature, to cause growth of island-like single crystal cores. Further, a high temperature growth process is conducted in a material gas atmosphere containing TMG, whereby a GaAs film is epitaxially grown on the semiconductor substrate surface.
    Type: Grant
    Filed: May 3, 1995
    Date of Patent: November 26, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yasutoshi Suzuki, Takamasa Suzuki, Kunihiko Hara, Hajime Inuzuka, Naomi Awano, Kouichi Hoshino