Abstract: A method for removing a used organic resist in a downstream ashing apparatus on a silicon semiconductor wafer in which water vapor is added to an oxygen plasma gas generated by microwaves. The addition of the water vapor lowers an activation energy of the ashing reaction and increases the reactive species generated in the plasma. Accordingly, the ashing rate is increased even at a wafer processing temperature as low as 150.degree. C. The addition of water vapor increases the ashing rate for a wide range of the percentage of water content, such as 5 to 80%, allowing easy control of the process. The lowered operating temperature prevents contamination of the semiconductor wafer. Since CF.sub.4 is not used the SiO.sub.2 layer is protected from being undesirably etched and the semiconductor characteristics do not deteriorate.

Abstract: A downstream ashing apparatus for removing organic resist from a silicon semiconductor wafer. The apparatus includes a waveguide leading to a microwave cavity. A plasma generating chamber is a part of the cavity, which also includes a quartz plate that is transparent to the microwaves. A device feeds oxygen gas and water vapor to the plasma generating chamber. A plasma is generated by the microwaves from the gas mixture in the plasma generating chamber. On a wall opposite the quartz plate, a plurality of holes is provided which connects the plasma generating chamber to a reaction chamber. Only a reactive species, such as oxygen atoms, generated in the plasma, flows from the plasma generating chamber through the holes and into the reaction chamber. The microwaves do not pass into the reaction chamber. The reactive species chemically reacts with and removes the resist on the semiconductor wafer in the reaction chamber.

Abstract: A method for removing a used organic resist in a downstream ashing apparatus on a silicon semiconductor wafer in which water vapor is added to an oxygen plasma gas generated by microwaves. The addition of the water vapor lowers an activation energy of the ashing reaction and increases the reactive species generated in the plasma. Accordingly, the ashing rate is increased even at a wafer processing temperature as low as 150.degree. C. The addition of water vapor increases the ashing rate for a wide range of the percentage of water content, such as 5 to 80%, allowing easy control of the process. The lowered operating temperature prevents contamination of the semiconductor wafer. Since CF.sub.4 is not used the SiO.sub.2 layer is protected from being undesirably etched and the semiconductor characteristics do not deteriorate.

Abstract: Process for the formation of resist patterns in a single layer resist process and a two layer resist process comprising using a resist material prepared from a silicon-containing polymer and an addition agent which can bond to said polymer upon an addition reaction when said resist material is exposed to a patterning radiation, and developing an exposed layer of said resist material with the down flow etching. The resulting resist patterns can be advantageously used in the production of LSIs, VLSIs and other devices.

Abstract: A trench etching process comprises the steps of: preparing a substrate, forming a mask pattern for the trench etching having a material different from that of the substrate, on the substrate, and detecting changes in results of emission spectroanalyses generated by etching the mask pattern and the substrate while using the etching ratios of the mask pattern and the silicon substrate to determine that the trench etching is completed.

Abstract: A process for the formation of a negative resist pattern, comprising preparing a mixture consisting of water-soluble polymeric material having at least one hydroxyl group with a photoacid generator capable of releasing an acid upon radiation exposure, coating a solution of the resist material onto a substrate to form a resist layer, exposing layer to patterned radiation, heating the exposed resist layer in the presence of an acid as a catalyst to remove water, and developing resist layer with water to remove unexposed areas to form a resist pattern on the substrate.

Abstract: An electrostatic chucking device is positioned on a supporting base, the temperature of which is maintained at a predetermined value, the device having an insulator, and a pair of plane electrodes on the insulator, and a material being chucked on the bottom surface of the top surface of the insulator, wherein the sum of the area of portions of the pair of plane electrodes facing the direction of the material being approximately equal to the contact area between the material and the insulator, and wherein a voltage is applied between the plane electrodes from an external power source, thereby effectively electrostatically chucking the material to the supporting base.