Abstract: An information processing system of the invention includes a first system to which a first device is connected, that produces a request for the first device; a second system which is independent from the first system. The first system includes a first element which outputs the request to the second system. The second system has a second element which receives the request from the first element and outputs the request to the first system. The first system also has a third element which receives the request from the second element and outputs the request to the first device.

Abstract: In a computer network, at least one of the computers transmits a request packet to a destination urge a reply packet therefrom. A decoder is provided to determine the identity of a destination from which a reply packet is received and, in response, generates a reply interrupt command. A microprocessor is responsive to the reply interrupt command for performing a reply interrupt routine. First and second reply monitor circuits are associated respectively with other computers. Each of the reply monitor circuits comprises a flag arranged to be set when a request packet is transmitted from the microprocessor to another computer with which the reply monitor circuit is associated and arranged to be reset by the decoder when a reply packet is received from the another microprocessor-based system. A timer is activated in response to the flag being set for measuring the amount of time and deactivated in response to the flag being reset.